Browse Source

drop spurious files

Samuel Thibault 5 years ago
parent
commit
188ec6155d
80 changed files with 1 additions and 7577 deletions
  1. 1 0
      tests/.gitignore
  2. BIN
      tests/StreamFMA_MAX5C_DFE_SIM/__process.dat
  3. 0 419
      tests/StreamFMA_MAX5C_DFE_SIM/_build.log
  4. 0 62
      tests/StreamFMA_MAX5C_DFE_SIM/_init.conf
  5. 0 1
      tests/StreamFMA_MAX5C_DFE_SIM/results/StreamFMA-StreamFMAKernel-final-simulation.pxg
  6. 0 1
      tests/StreamFMA_MAX5C_DFE_SIM/results/StreamFMA-StreamFMAKernel-original.pxg
  7. 0 1
      tests/StreamFMA_MAX5C_DFE_SIM/results/StreamFMA.h
  8. 0 1
      tests/StreamFMA_MAX5C_DFE_SIM/results/StreamFMA.max
  9. 0 1
      tests/StreamFMA_MAX5C_DFE_SIM/results/StreamFMA.xml
  10. 0 1
      tests/StreamFMA_MAX5C_DFE_SIM/results/StreamFMAKernel_Configuration.txt
  11. 0 1
      tests/StreamFMA_MAX5C_DFE_SIM/results/StreamFMAKernel_NodeDiary.txt
  12. 0 16
      tests/StreamFMA_MAX5C_DFE_SIM/scratch/Manager_StreamFMA.graphs
  13. 0 103
      tests/StreamFMA_MAX5C_DFE_SIM/scratch/Manager_StreamFMA_Final.mxg
  14. 0 30
      tests/StreamFMA_MAX5C_DFE_SIM/scratch/Manager_StreamFMA_Original.mxg
  15. 0 20
      tests/StreamFMA_MAX5C_DFE_SIM/scratch/Manager_StreamFMA_clockwidth.dot
  16. 0 15
      tests/StreamFMA_MAX5C_DFE_SIM/scratch/Manager_StreamFMA_dualaspect.dot
  17. 0 27
      tests/StreamFMA_MAX5C_DFE_SIM/scratch/Manager_StreamFMA_final.dot
  18. 0 9
      tests/StreamFMA_MAX5C_DFE_SIM/scratch/Manager_StreamFMA_orig.dot
  19. 0 9
      tests/StreamFMA_MAX5C_DFE_SIM/scratch/Manager_StreamFMA_pipelining.dot
  20. 0 17
      tests/StreamFMA_MAX5C_DFE_SIM/scratch/Manager_StreamFMA_pullpush.dot
  21. 0 9
      tests/StreamFMA_MAX5C_DFE_SIM/scratch/Manager_StreamFMA_schedstall.dot
  22. 0 1447
      tests/StreamFMA_MAX5C_DFE_SIM/scratch/MaxCompilerDesignData.dat
  23. 0 1
      tests/StreamFMA_MAX5C_DFE_SIM/scratch/MaxInfo.json
  24. 0 259
      tests/StreamFMA_MAX5C_DFE_SIM/scratch/StreamFMA-StreamFMAKernel-final-simulation.pxg
  25. 0 280
      tests/StreamFMA_MAX5C_DFE_SIM/scratch/StreamFMA-StreamFMAKernel-original.pxg
  26. 0 188
      tests/StreamFMA_MAX5C_DFE_SIM/scratch/StreamFMA.h
  27. 0 2895
      tests/StreamFMA_MAX5C_DFE_SIM/scratch/StreamFMA.max
  28. 0 1
      tests/StreamFMA_MAX5C_DFE_SIM/scratch/StreamFMA.xml
  29. 0 22
      tests/StreamFMA_MAX5C_DFE_SIM/scratch/StreamFMAKernel.graphs
  30. 0 0
      tests/StreamFMA_MAX5C_DFE_SIM/scratch/StreamFMAKernel_Assertions.h
  31. 0 61
      tests/StreamFMA_MAX5C_DFE_SIM/scratch/StreamFMAKernel_Configuration.txt
  32. 0 9
      tests/StreamFMA_MAX5C_DFE_SIM/scratch/StreamFMAKernel_CriticalPath_a_to_output.dot
  33. 0 9
      tests/StreamFMA_MAX5C_DFE_SIM/scratch/StreamFMAKernel_CriticalPath_b_to_output.dot
  34. 0 2
      tests/StreamFMA_MAX5C_DFE_SIM/scratch/StreamFMAKernel_FIFOReport.dot
  35. 0 0
      tests/StreamFMA_MAX5C_DFE_SIM/scratch/StreamFMAKernel_FIFOReport.txt
  36. 0 2
      tests/StreamFMA_MAX5C_DFE_SIM/scratch/StreamFMAKernel_FIFOReportSimple.dot
  37. 0 8
      tests/StreamFMA_MAX5C_DFE_SIM/scratch/StreamFMAKernel_FIFOReportTopHitters.txt
  38. 0 2
      tests/StreamFMA_MAX5C_DFE_SIM/scratch/StreamFMAKernel_IODistances.h
  39. 0 256
      tests/StreamFMA_MAX5C_DFE_SIM/scratch/StreamFMAKernel_NodeDiary.txt
  40. 0 23
      tests/StreamFMA_MAX5C_DFE_SIM/scratch/StreamFMAKernel_NodeStallScopeLog.txt
  41. 0 0
      tests/StreamFMA_MAX5C_DFE_SIM/scratch/StreamFMAKernel_StreamOffsetEqs.h
  42. 0 9
      tests/StreamFMA_MAX5C_DFE_SIM/scratch/StreamFMAKernel_final.dot
  43. 0 25
      tests/StreamFMA_MAX5C_DFE_SIM/scratch/StreamFMAKernel_final_graphDump.dat
  44. 0 10
      tests/StreamFMA_MAX5C_DFE_SIM/scratch/StreamFMAKernel_nodeschedule_firstfifos.csv
  45. 0 10
      tests/StreamFMA_MAX5C_DFE_SIM/scratch/StreamFMAKernel_nodeschedule_firstpass.csv
  46. 0 10
      tests/StreamFMA_MAX5C_DFE_SIM/scratch/StreamFMAKernel_nodeschedule_secondpass.csv
  47. 0 9
      tests/StreamFMA_MAX5C_DFE_SIM/scratch/StreamFMAKernel_optimised.dot
  48. 0 9
      tests/StreamFMA_MAX5C_DFE_SIM/scratch/StreamFMAKernel_original.dot
  49. 0 35
      tests/StreamFMA_MAX5C_DFE_SIM/scratch/StreamFMAKernel_photon_stats.csv
  50. 0 9
      tests/StreamFMA_MAX5C_DFE_SIM/scratch/StreamFMAKernel_post_dsp_extraction.dot
  51. 0 9
      tests/StreamFMA_MAX5C_DFE_SIM/scratch/StreamFMAKernel_post_tri_add_extraction.dot
  52. 0 9
      tests/StreamFMA_MAX5C_DFE_SIM/scratch/StreamFMAKernel_pre_condadd_extraction.dot
  53. 0 9
      tests/StreamFMA_MAX5C_DFE_SIM/scratch/StreamFMAKernel_pre_dsp_extraction.dot
  54. 0 20
      tests/StreamFMA_MAX5C_DFE_SIM/scratch/StreamFMAKernel_schedule_C.csv
  55. BIN
      tests/StreamFMA_MAX5C_DFE_SIM/scratch/StreamFMAKernel_schedule_C.mps.gz
  56. 0 55
      tests/StreamFMA_MAX5C_DFE_SIM/scratch/StreamFMAKernel_schedule_C.stdout.log
  57. 0 9
      tests/StreamFMA_MAX5C_DFE_SIM/scratch/StreamFMAKernel_tapnfold_1.dot
  58. 0 9
      tests/StreamFMA_MAX5C_DFE_SIM/scratch/StreamFMAKernel_tapnfold_2.dot
  59. 0 9
      tests/StreamFMA_MAX5C_DFE_SIM/scratch/StreamFMAKernel_validated_fifos.dot
  60. 0 49
      tests/StreamFMA_MAX5C_DFE_SIM/scratch/StreamWrapperRegs.info
  61. 0 1
      tests/StreamFMA_MAX5C_DFE_SIM/scratch/allEngParams.json
  62. 0 20
      tests/StreamFMA_MAX5C_DFE_SIM/scratch/manager_clock_report.txt
  63. 0 9
      tests/StreamFMA_MAX5C_DFE_SIM/scratch/software-sim/build/Makefile.local_rules
  64. 0 9
      tests/StreamFMA_MAX5C_DFE_SIM/scratch/software-sim/build/Makefile.local_rules.tmp
  65. BIN
      tests/StreamFMA_MAX5C_DFE_SIM/scratch/software-sim/build/StreamFMA.so
  66. 0 138
      tests/StreamFMA_MAX5C_DFE_SIM/scratch/software-sim/build/StreamFMAKernel.cpp
  67. 0 79
      tests/StreamFMA_MAX5C_DFE_SIM/scratch/software-sim/build/StreamFMAKernel.h
  68. 0 31
      tests/StreamFMA_MAX5C_DFE_SIM/scratch/software-sim/build/StreamFMAKernel_Templates.cpp
  69. 0 166
      tests/StreamFMA_MAX5C_DFE_SIM/scratch/software-sim/build/StreamFMAKernel_exec0.cpp
  70. 0 35
      tests/StreamFMA_MAX5C_DFE_SIM/scratch/software-sim/build/objdir/StreamFMAKernel.O0.d
  71. 0 35
      tests/StreamFMA_MAX5C_DFE_SIM/scratch/software-sim/build/objdir/StreamFMAKernel_Templates.O2.d
  72. 0 35
      tests/StreamFMA_MAX5C_DFE_SIM/scratch/software-sim/build/objdir/StreamFMAKernel_exec0.O2.d
  73. 0 74
      tests/StreamFMA_MAX5C_DFE_SIM/scratch/software-sim/build/objdir/max_msi.d
  74. 0 4
      tests/StreamFMA_MAX5C_DFE_SIM/scratch/software-sim/build/stdkernel_headers.h
  75. 0 4
      tests/StreamFMA_MAX5C_DFE_SIM/scratch/software-sim/build/stdkernel_headers.h.tmp
  76. 0 138
      tests/StreamFMA_MAX5C_DFE_SIM/scratch/software-sim/build/tmp_resource_dump/StreamFMAKernel.cpp
  77. 0 79
      tests/StreamFMA_MAX5C_DFE_SIM/scratch/software-sim/build/tmp_resource_dump/StreamFMAKernel.h
  78. 0 31
      tests/StreamFMA_MAX5C_DFE_SIM/scratch/software-sim/build/tmp_resource_dump/StreamFMAKernel_Templates.cpp
  79. 0 166
      tests/StreamFMA_MAX5C_DFE_SIM/scratch/software-sim/build/tmp_resource_dump/StreamFMAKernel_exec0.cpp
  80. 0 11
      tests/StreamFMA_MAX5C_DFE_SIM/scratch/userInputsAndDefaults.engParams

+ 1 - 0
tests/.gitignore

@@ -1 +1,2 @@
 /.deps
+StreamFMA_MAX5C_DFE_SIM

BIN
tests/StreamFMA_MAX5C_DFE_SIM/__process.dat


File diff suppressed because it is too large
+ 0 - 419
tests/StreamFMA_MAX5C_DFE_SIM/_build.log


+ 0 - 62
tests/StreamFMA_MAX5C_DFE_SIM/_init.conf

@@ -1,62 +0,0 @@
-#
-#Tue Oct 29 11:40:12 CET 2019
-build.quartus_version=13.1
-photon.verbose_simulation=true
-xdl.cluster_tags=linux
-xst.ram_usage=4096
-xst.cluster_tags=linux
-ngcbuild.cluster_tags=linux
-build.arbitrated_core_cache=
-xdl.command=xdl
-build.datestamp_builds_format=dd-MM-yy
-simulation.compile.max_optimization_level=2
-maxfile.ram_usage=5120
-ngdbuild.command=ngdbuild
-mapper.command=map
-maxfile.cluster_tags=linux
-user_friendly_stack_traces=true
-buildresource.medium_build_factor=80
-release_mode=true
-buildresource.small_build_factor=50
-buildresource.abort_when_overmapped_dsps=true
-trce.ram_usage=8192
-bitgen.command=bitgen
-build.root_dir=
-buildresource.autoresize=true
-ngcbuild.command=ngcbuild
-simulation.compile.precompiled_header=1
-xdl.ram_usage=4096
-simulation.compile.explicit_template_instantiation=1
-ngdbuild.ram_usage=4096
-buildresource.abort_when_overmapped_bram=true
-par.command=par
-coregen.command=coregen
-ngcbuild.ram_usage=4096
-build.print_run_job_hashes=false
-photon.draw_control_nodes=true
-xst.command=ulimit -s unlimited && xst
-vsim.retry_delay=60
-ngdbuild.cluster_tags=linux
-buildresource.abort_when_overmapped_ffs=false
-build.ise_version=13.3
-maxfile.command=/opt/Software/maxeler/maxcompiler-2018.3.1/bin/maxfilestitch
-trce.command=trce
-build.verbose_output=false
-vsim.retries=5
-mapper.ram_usage=8192
-simulation.compile.parallelism=2
-build.datestamp_builds=false
-simulation.compile.generate_debug_info=0
-buildresource.small_build_is=45000
-buildresource.medium_build_is=100000
-dot.ram_usage=2048
-par.cluster_tags=linux;longrun
-par.ram_usage=8192
-photon.coloured_graph_lines=true
-vsim.command=vsim
-bitgen.ram_usage=5120
-photon.draw_groups=false
-build.enable_source_backup=true
-modelsim.ram_usage=1024
-trce.cluster_tags=linux
-mapper.cluster_tags=linux;longrun

+ 0 - 1
tests/StreamFMA_MAX5C_DFE_SIM/results/StreamFMA-StreamFMAKernel-final-simulation.pxg

@@ -1 +0,0 @@
-../scratch/StreamFMA-StreamFMAKernel-final-simulation.pxg

+ 0 - 1
tests/StreamFMA_MAX5C_DFE_SIM/results/StreamFMA-StreamFMAKernel-original.pxg

@@ -1 +0,0 @@
-../scratch/StreamFMA-StreamFMAKernel-original.pxg

+ 0 - 1
tests/StreamFMA_MAX5C_DFE_SIM/results/StreamFMA.h

@@ -1 +0,0 @@
-../scratch/StreamFMA.h

+ 0 - 1
tests/StreamFMA_MAX5C_DFE_SIM/results/StreamFMA.max

@@ -1 +0,0 @@
-../scratch/StreamFMA.max

+ 0 - 1
tests/StreamFMA_MAX5C_DFE_SIM/results/StreamFMA.xml

@@ -1 +0,0 @@
-../scratch/StreamFMA.xml

+ 0 - 1
tests/StreamFMA_MAX5C_DFE_SIM/results/StreamFMAKernel_Configuration.txt

@@ -1 +0,0 @@
-../scratch/StreamFMAKernel_Configuration.txt

+ 0 - 1
tests/StreamFMA_MAX5C_DFE_SIM/results/StreamFMAKernel_NodeDiary.txt

@@ -1 +0,0 @@
-../scratch/StreamFMAKernel_NodeDiary.txt

+ 0 - 16
tests/StreamFMA_MAX5C_DFE_SIM/scratch/Manager_StreamFMA.graphs

@@ -1,16 +0,0 @@
-Tue Oct 29 11:40:15 CET 2019
-Manager_StreamFMA
-orig
-Manager_StreamFMA_orig.dot
-pipelining
-Manager_StreamFMA_pipelining.dot
-schedstall
-Manager_StreamFMA_schedstall.dot
-clockwidth
-Manager_StreamFMA_clockwidth.dot
-dualaspect
-Manager_StreamFMA_dualaspect.dot
-pullpush
-Manager_StreamFMA_pullpush.dot
-final
-Manager_StreamFMA_final.dot

+ 0 - 103
tests/StreamFMA_MAX5C_DFE_SIM/scratch/Manager_StreamFMA_Final.mxg

@@ -1,103 +0,0 @@
-<?xml version="1.0" encoding="UTF-8" ?>
-<ManagerGraph version="2018.3.1" design_name="Manager_StreamFMA" compilation_phase="Final" hardwareBuild="false">
-	<Node id="5" instanceName="b" type="Input">
-		<Output clock="PCIE" name="b" type="PUSH 2" width="128">
-			<Stream name="Stream_6" sink="30" />
-		</Output>
-	</Node>
-	<Node id="2" instanceName="a" type="Input">
-		<Output clock="PCIE" name="a" type="PUSH 2" width="128">
-			<Stream name="Stream_3" sink="26" />
-		</Output>
-	</Node>
-	<Node id="30" instanceName="Stream_15" type="Fifo">
-		<Input clock="PCIE" name="input" type="PUSH 2" width="128">
-			<Stream name="Stream_31" source="5" />
-		</Input>
-		<Output clock="PCIE" name="output" type="PULL el=1" width="128">
-			<Stream name="Stream_32" sink="14" />
-		</Output>
-	</Node>
-	<Node id="26" instanceName="Stream_11" type="Fifo">
-		<Input clock="PCIE" name="input" type="PUSH 2" width="128">
-			<Stream name="Stream_27" source="2" />
-		</Input>
-		<Output clock="PCIE" name="output" type="PULL el=1" width="128">
-			<Stream name="Stream_28" sink="10" />
-		</Output>
-	</Node>
-	<Node id="10" instanceName="Stream_1" type="DualAspectMux">
-		<Input clock="PCIE" name="input" type="PULL el=1" width="128">
-			<Stream name="Stream_29" source="26" />
-		</Input>
-		<Output clock="PCIE" name="output" type="PUSH 2" width="32">
-			<Stream name="Stream_12" sink="34" />
-		</Output>
-	</Node>
-	<Node id="14" instanceName="Stream_4" type="DualAspectMux">
-		<Input clock="PCIE" name="input" type="PULL el=1" width="128">
-			<Stream name="Stream_33" source="30" />
-		</Input>
-		<Output clock="PCIE" name="output" type="PUSH 2" width="32">
-			<Stream name="Stream_16" sink="38" />
-		</Output>
-	</Node>
-	<Node id="38" instanceName="Stream_17" type="Fifo">
-		<Input clock="PCIE" name="input" type="PUSH 2" width="32">
-			<Stream name="Stream_39" source="14" />
-		</Input>
-		<Output clock="STREAM" name="output" type="PULL el=1 ael=2" width="32">
-			<Stream name="Stream_40" sink="0" />
-		</Output>
-	</Node>
-	<Node id="34" instanceName="Stream_13" type="Fifo">
-		<Input clock="PCIE" name="input" type="PUSH 2" width="32">
-			<Stream name="Stream_35" source="10" />
-		</Input>
-		<Output clock="STREAM" name="output" type="PULL el=1 ael=2" width="32">
-			<Stream name="Stream_36" sink="0" />
-		</Output>
-	</Node>
-	<Node id="0" instanceName="StreamFMAKernel" type="Kernel">
-		<PxgFile phase="original">StreamFMA-StreamFMAKernel-original.pxg</PxgFile>
-		<PxgFile phase="final-simulation">StreamFMA-StreamFMAKernel-final-simulation.pxg</PxgFile>
-		<Input clock="STREAM" name="a" type="PULL el=1 ael=2" width="32">
-			<Stream name="Stream_37" source="34" />
-		</Input>
-		<Input clock="STREAM" name="b" type="PULL el=1 ael=2" width="32">
-			<Stream name="Stream_41" source="38" />
-		</Input>
-		<Output clock="STREAM" name="output" type="PUSH 5" width="32">
-			<Stream name="Stream_9" sink="42" />
-		</Output>
-	</Node>
-	<Node id="42" instanceName="Stream_19" type="Fifo">
-		<Input clock="STREAM" name="input" type="PUSH 5" width="32">
-			<Stream name="Stream_43" source="0" />
-		</Input>
-		<Output clock="PCIE" name="output" type="PULL el=1" width="32">
-			<Stream name="Stream_44" sink="18" />
-		</Output>
-	</Node>
-	<Node id="18" instanceName="Stream_8" type="DualAspectReg">
-		<Input clock="PCIE" name="input" type="PULL el=1" width="32">
-			<Stream name="Stream_45" source="42" />
-		</Input>
-		<Output clock="PCIE" name="output" type="PULL el=1" width="128">
-			<Stream name="Stream_20" sink="22" />
-		</Output>
-	</Node>
-	<Node id="22" instanceName="Stream_21" type="PullPushAdapter">
-		<Input clock="PCIE" name="input" type="PULL el=1" width="128">
-			<Stream name="Stream_23" source="18" />
-		</Input>
-		<Output clock="PCIE" name="output" type="PUSH 1" width="128">
-			<Stream name="Stream_24" sink="7" />
-		</Output>
-	</Node>
-	<Node id="7" instanceName="output" type="Output">
-		<Input clock="PCIE" name="output" type="PUSH 1" width="128">
-			<Stream name="Stream_25" source="22" />
-		</Input>
-	</Node>
-</ManagerGraph>

+ 0 - 30
tests/StreamFMA_MAX5C_DFE_SIM/scratch/Manager_StreamFMA_Original.mxg

@@ -1,30 +0,0 @@
-<?xml version="1.0" encoding="UTF-8" ?>
-<ManagerGraph version="2018.3.1" design_name="Manager_StreamFMA" compilation_phase="Original" hardwareBuild="false">
-	<Node id="5" instanceName="b" type="Input">
-		<Output clock="PCIE" name="b" type="PUSH 2" width="128">
-			<Stream name="Stream_6" sink="0" />
-		</Output>
-	</Node>
-	<Node id="2" instanceName="a" type="Input">
-		<Output clock="PCIE" name="a" type="PUSH 2" width="128">
-			<Stream name="Stream_3" sink="0" />
-		</Output>
-	</Node>
-	<Node id="0" instanceName="StreamFMAKernel" type="Kernel">
-		<PxgFile phase="original">StreamFMA-StreamFMAKernel-original.pxg</PxgFile>
-		<Input clock="STREAM" name="a" type="PULL el=1 ael=2" width="32">
-			<Stream name="Stream_1" source="2" />
-		</Input>
-		<Input clock="STREAM" name="b" type="PULL el=1 ael=2" width="32">
-			<Stream name="Stream_4" source="5" />
-		</Input>
-		<Output clock="STREAM" name="output" type="PUSH 5" width="32">
-			<Stream name="Stream_9" sink="7" />
-		</Output>
-	</Node>
-	<Node id="7" instanceName="output" type="Output">
-		<Input clock="PCIE" name="output" type="PUSH 1" width="128">
-			<Stream name="Stream_8" source="0" />
-		</Input>
-	</Node>
-</ManagerGraph>

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+ 0 - 20
tests/StreamFMA_MAX5C_DFE_SIM/scratch/Manager_StreamFMA_clockwidth.dot


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+ 0 - 15
tests/StreamFMA_MAX5C_DFE_SIM/scratch/Manager_StreamFMA_dualaspect.dot


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+ 0 - 27
tests/StreamFMA_MAX5C_DFE_SIM/scratch/Manager_StreamFMA_final.dot


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+ 0 - 9
tests/StreamFMA_MAX5C_DFE_SIM/scratch/Manager_StreamFMA_orig.dot


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+ 0 - 9
tests/StreamFMA_MAX5C_DFE_SIM/scratch/Manager_StreamFMA_pipelining.dot


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+ 0 - 17
tests/StreamFMA_MAX5C_DFE_SIM/scratch/Manager_StreamFMA_pullpush.dot


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+ 0 - 9
tests/StreamFMA_MAX5C_DFE_SIM/scratch/Manager_StreamFMA_schedstall.dot


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+ 0 - 1447
tests/StreamFMA_MAX5C_DFE_SIM/scratch/MaxCompilerDesignData.dat


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+ 0 - 1
tests/StreamFMA_MAX5C_DFE_SIM/scratch/MaxInfo.json


+ 0 - 259
tests/StreamFMA_MAX5C_DFE_SIM/scratch/StreamFMA-StreamFMAKernel-final-simulation.pxg

@@ -1,259 +0,0 @@
-<?xml version="1.0" encoding="UTF-8" ?>
-<Graph version="2018.3.1" pxg_version="2" maxfile_name="StreamFMA" design_name="StreamFMAKernel" compilation_phase="final-simulation" frequency="100,00">
-	<Node criticalPaths="[]" group="[]" id="8" isControl="true" isVisible="false" pipelineFactor="1.0" powerUsage="N/A" type="NodeInputMappedReg">
-		<Output latency="0" name="io_output_force_disabled" type="dfeOffsetFix(1, 0, UNSIGNED)" />
-		<Text>Scalar input (io_output_force_disabled)</Text>
-		<ResourceUsage DSPs="0" FFs="0" FMems="0" LUTs="0" />
-		<OriginStackTrace>com.maxeler.maxcompiler.v2.kernelcompiler.stdlib.core.IO.output(IO.java:836)
-perfmodels.StreamFMAKernel.&lt;init&gt;(StreamFMAKernel.maxj:21)
-perfmodels.StreamFMAManager.&lt;init&gt;(StreamFMAManager.maxj:13)
-perfmodels.StreamFMAManager.main(StreamFMAManager.maxj:20)</OriginStackTrace>
-		<Name>io_output_force_disabled</Name>
-	</Node>
-	<Edge criticalPaths="[]" dst_node_id="9" dst_node_input="a" src_node_id="8" src_node_output="io_output_force_disabled" />
-	<Node criticalPaths="[]" group="[]" id="9" isControl="true" isVisible="false" pipelineFactor="0.0" powerUsage="N/A" type="NodeNot">
-		<Input name="a" type="dfeOffsetFix(1, 0, UNSIGNED)" />
-		<Output latency="0" name="result" type="dfeOffsetFix(1, 0, UNSIGNED)" />
-		<Text>~</Text>
-		<ResourceUsage DSPs="0" FFs="0" FMems="0" LUTs="0" />
-		<OriginStackTrace>com.maxeler.maxcompiler.v2.kernelcompiler.stdlib.core.IO.output(IO.java:836)
-perfmodels.StreamFMAKernel.&lt;init&gt;(StreamFMAKernel.maxj:21)
-perfmodels.StreamFMAManager.&lt;init&gt;(StreamFMAManager.maxj:13)
-perfmodels.StreamFMAManager.main(StreamFMAManager.maxj:20)</OriginStackTrace>
-	</Node>
-	<Edge criticalPaths="[]" dst_node_id="11" dst_node_input="output_control" src_node_id="9" src_node_output="result" />
-	<Node criticalPaths="[]" group="[]" id="0" isControl="true" isVisible="false" pipelineFactor="1.0" powerUsage="N/A" type="NodeInputMappedReg">
-		<Output latency="0" name="io_a_force_disabled" type="dfeOffsetFix(1, 0, UNSIGNED)" />
-		<Text>Scalar input (io_a_force_disabled)</Text>
-		<ResourceUsage DSPs="0" FFs="0" FMems="0" LUTs="0" />
-		<OriginStackTrace>com.maxeler.maxcompiler.v2.kernelcompiler.stdlib.core.IO.input(IO.java:630)
-perfmodels.StreamFMAKernel.&lt;init&gt;(StreamFMAKernel.maxj:15)
-perfmodels.StreamFMAManager.&lt;init&gt;(StreamFMAManager.maxj:13)
-perfmodels.StreamFMAManager.main(StreamFMAManager.maxj:20)</OriginStackTrace>
-		<Name>io_a_force_disabled</Name>
-	</Node>
-	<Edge criticalPaths="[]" dst_node_id="1" dst_node_input="a" src_node_id="0" src_node_output="io_a_force_disabled" />
-	<Node criticalPaths="[]" group="[]" id="1" isControl="true" isVisible="false" pipelineFactor="0.0" powerUsage="N/A" type="NodeNot">
-		<Input name="a" type="dfeOffsetFix(1, 0, UNSIGNED)" />
-		<Output latency="0" name="result" type="dfeOffsetFix(1, 0, UNSIGNED)" />
-		<Text>~</Text>
-		<ResourceUsage DSPs="0" FFs="0" FMems="0" LUTs="0" />
-		<OriginStackTrace>com.maxeler.maxcompiler.v2.kernelcompiler.stdlib.core.IO.input(IO.java:630)
-perfmodels.StreamFMAKernel.&lt;init&gt;(StreamFMAKernel.maxj:15)
-perfmodels.StreamFMAManager.&lt;init&gt;(StreamFMAManager.maxj:13)
-perfmodels.StreamFMAManager.main(StreamFMAManager.maxj:20)</OriginStackTrace>
-	</Node>
-	<Edge criticalPaths="[]" dst_node_id="2" dst_node_input="enable" src_node_id="1" src_node_output="result" />
-	<Node criticalPaths="[0]" group="[]" id="2" isControl="false" isVisible="true" pipelineFactor="1.0" powerUsage="N/A" type="NodeInput">
-		<Input name="enable" type="dfeOffsetFix(1, 0, UNSIGNED)" />
-		<Output latency="5" name="data" type="dfeOffsetFix(32, 0, TWOSCOMPLEMENT)" />
-		<Text>Input(a)</Text>
-		<ResourceUsage DSPs="0" FFs="0" FMems="0" LUTs="0" />
-		<OriginStackTrace>com.maxeler.maxcompiler.v2.kernelcompiler.stdlib.core.IO.input(IO.java:630)
-perfmodels.StreamFMAKernel.&lt;init&gt;(StreamFMAKernel.maxj:15)
-perfmodels.StreamFMAManager.&lt;init&gt;(StreamFMAManager.maxj:13)
-perfmodels.StreamFMAManager.main(StreamFMAManager.maxj:20)</OriginStackTrace>
-		<Name>a</Name>
-	</Node>
-	<Edge criticalPaths="[0]" dst_node_id="6" dst_node_input="a" src_node_id="2" src_node_output="data" />
-	<Node criticalPaths="[]" group="[]" id="3" isControl="true" isVisible="false" pipelineFactor="1.0" powerUsage="N/A" type="NodeInputMappedReg">
-		<Output latency="0" name="io_b_force_disabled" type="dfeOffsetFix(1, 0, UNSIGNED)" />
-		<Text>Scalar input (io_b_force_disabled)</Text>
-		<ResourceUsage DSPs="0" FFs="0" FMems="0" LUTs="0" />
-		<OriginStackTrace>com.maxeler.maxcompiler.v2.kernelcompiler.stdlib.core.IO.input(IO.java:630)
-perfmodels.StreamFMAKernel.&lt;init&gt;(StreamFMAKernel.maxj:16)
-perfmodels.StreamFMAManager.&lt;init&gt;(StreamFMAManager.maxj:13)
-perfmodels.StreamFMAManager.main(StreamFMAManager.maxj:20)</OriginStackTrace>
-		<Name>io_b_force_disabled</Name>
-	</Node>
-	<Edge criticalPaths="[]" dst_node_id="4" dst_node_input="a" src_node_id="3" src_node_output="io_b_force_disabled" />
-	<Node criticalPaths="[]" group="[]" id="4" isControl="true" isVisible="false" pipelineFactor="0.0" powerUsage="N/A" type="NodeNot">
-		<Input name="a" type="dfeOffsetFix(1, 0, UNSIGNED)" />
-		<Output latency="0" name="result" type="dfeOffsetFix(1, 0, UNSIGNED)" />
-		<Text>~</Text>
-		<ResourceUsage DSPs="0" FFs="0" FMems="0" LUTs="0" />
-		<OriginStackTrace>com.maxeler.maxcompiler.v2.kernelcompiler.stdlib.core.IO.input(IO.java:630)
-perfmodels.StreamFMAKernel.&lt;init&gt;(StreamFMAKernel.maxj:16)
-perfmodels.StreamFMAManager.&lt;init&gt;(StreamFMAManager.maxj:13)
-perfmodels.StreamFMAManager.main(StreamFMAManager.maxj:20)</OriginStackTrace>
-	</Node>
-	<Edge criticalPaths="[]" dst_node_id="5" dst_node_input="enable" src_node_id="4" src_node_output="result" />
-	<Node criticalPaths="[1]" group="[]" id="5" isControl="false" isVisible="true" pipelineFactor="1.0" powerUsage="N/A" type="NodeInput">
-		<Input name="enable" type="dfeOffsetFix(1, 0, UNSIGNED)" />
-		<Output latency="5" name="data" type="dfeOffsetFix(32, 0, TWOSCOMPLEMENT)" />
-		<Text>Input(b)</Text>
-		<ResourceUsage DSPs="0" FFs="0" FMems="0" LUTs="0" />
-		<OriginStackTrace>com.maxeler.maxcompiler.v2.kernelcompiler.stdlib.core.IO.input(IO.java:630)
-perfmodels.StreamFMAKernel.&lt;init&gt;(StreamFMAKernel.maxj:16)
-perfmodels.StreamFMAManager.&lt;init&gt;(StreamFMAManager.maxj:13)
-perfmodels.StreamFMAManager.main(StreamFMAManager.maxj:20)</OriginStackTrace>
-		<Name>b</Name>
-	</Node>
-	<Edge criticalPaths="[1]" dst_node_id="6" dst_node_input="b" src_node_id="5" src_node_output="data" />
-	<Node criticalPaths="[0, 1]" group="[]" id="6" isControl="false" isVisible="true" pipelineFactor="1.0" powerUsage="N/A" type="NodeAdd">
-		<Input name="a" type="dfeOffsetFix(32, 0, TWOSCOMPLEMENT)" />
-		<Input name="b" type="dfeOffsetFix(32, 0, TWOSCOMPLEMENT)" />
-		<Output latency="1" name="result" type="dfeOffsetFix(32, 0, TWOSCOMPLEMENT)" />
-		<Text>+</Text>
-		<ResourceUsage DSPs="0" FFs="32" FMems="0" LUTs="64" />
-		<OriginStackTrace>com.maxeler.maxcompiler.v2.kernelcompiler.types.base.DFEVar.add(DFEVar.java:1010)
-perfmodels.StreamFMAKernel.&lt;init&gt;(StreamFMAKernel.maxj:19)
-perfmodels.StreamFMAManager.&lt;init&gt;(StreamFMAManager.maxj:13)
-perfmodels.StreamFMAManager.main(StreamFMAManager.maxj:20)</OriginStackTrace>
-	</Node>
-	<Edge criticalPaths="[0, 1]" dst_node_id="11" dst_node_input="data" src_node_id="6" src_node_output="result" />
-	<Node criticalPaths="[0, 1]" group="[]" id="11" isControl="false" isVisible="true" pipelineFactor="1.0" powerUsage="N/A" type="NodeOutput">
-		<Input name="output_control" type="dfeOffsetFix(1, 0, UNSIGNED)" />
-		<Input name="data" type="dfeOffsetFix(32, 0, TWOSCOMPLEMENT)" />
-		<Text>Output(output)</Text>
-		<ResourceUsage DSPs="0" FFs="0" FMems="0" LUTs="0" />
-		<OriginStackTrace>com.maxeler.maxcompiler.v2.kernelcompiler.stdlib.core.IO.output(IO.java:836)
-perfmodels.StreamFMAKernel.&lt;init&gt;(StreamFMAKernel.maxj:21)
-perfmodels.StreamFMAManager.&lt;init&gt;(StreamFMAManager.maxj:13)
-perfmodels.StreamFMAManager.main(StreamFMAManager.maxj:20)</OriginStackTrace>
-		<Name>output</Name>
-	</Node>
-	<Node criticalPaths="[]" group="[]" id="16" isControl="false" isVisible="false" pipelineFactor="1.0" powerUsage="N/A" type="NodeConstantRawBits">
-		<Output latency="0" name="value" type="dfeOffsetFix(1, 0, UNSIGNED)" />
-		<Text>{HWOffsetFix:1, 0, UNSIGNED}\n0x1; 1.0</Text>
-		<ResourceUsage DSPs="0" FFs="0" FMems="0" LUTs="0" />
-		<OriginStackTrace>com.maxeler.platform.max5.manager.Max5ManagerBase.addKernel(Unknown Source)
-perfmodels.StreamFMAManager.&lt;init&gt;(StreamFMAManager.maxj:13)
-perfmodels.StreamFMAManager.main(StreamFMAManager.maxj:20)</OriginStackTrace>
-		<Value>1</Value>
-		<HexValue>0x1</HexValue>
-		<NumericValue>1.0</NumericValue>
-	</Node>
-	<Edge criticalPaths="[]" dst_node_id="17" dst_node_input="load" src_node_id="16" src_node_output="value" />
-	<Node criticalPaths="[]" group="[]" id="26" isControl="false" isVisible="false" pipelineFactor="1.0" powerUsage="N/A" type="NodeConstantRawBits">
-		<Output latency="0" name="value" type="dfeOffsetFix(1, 0, UNSIGNED)" />
-		<Text>{HWOffsetFix:1, 0, UNSIGNED}\n0x1; 1.0</Text>
-		<ResourceUsage DSPs="0" FFs="0" FMems="0" LUTs="0" />
-		<OriginStackTrace>com.maxeler.platform.max5.manager.Max5ManagerBase.addKernel(Unknown Source)
-perfmodels.StreamFMAManager.&lt;init&gt;(StreamFMAManager.maxj:13)
-perfmodels.StreamFMAManager.main(StreamFMAManager.maxj:20)</OriginStackTrace>
-		<Value>1</Value>
-		<HexValue>0x1</HexValue>
-		<NumericValue>1.0</NumericValue>
-	</Node>
-	<Edge criticalPaths="[]" dst_node_id="14" dst_node_input="enable" src_node_id="26" src_node_output="value" />
-	<Node criticalPaths="[]" group="[]" id="13" isControl="false" isVisible="false" pipelineFactor="1.0" powerUsage="N/A" type="NodeConstantRawBits">
-		<Output latency="0" name="value" type="dfeOffsetFix(49, 0, UNSIGNED)" />
-		<Text>{HWOffsetFix:49, 0, UNSIGNED}\n0x1000000000000; 2.81474976710656E14</Text>
-		<ResourceUsage DSPs="0" FFs="0" FMems="0" LUTs="0" />
-		<OriginStackTrace>com.maxeler.platform.max5.manager.Max5ManagerBase.addKernel(Unknown Source)
-perfmodels.StreamFMAManager.&lt;init&gt;(StreamFMAManager.maxj:13)
-perfmodels.StreamFMAManager.main(StreamFMAManager.maxj:20)</OriginStackTrace>
-		<Value>1000000000000000000000000000000000000000000000000</Value>
-		<HexValue>0x1000000000000</HexValue>
-		<NumericValue>2.81474976710656E14</NumericValue>
-	</Node>
-	<Edge criticalPaths="[]" dst_node_id="14" dst_node_input="max" src_node_id="13" src_node_output="value" />
-	<Node criticalPaths="[]" group="[]" id="14" isControl="false" isVisible="false" pipelineFactor="1.0" powerUsage="N/A" type="NodeCounter">
-		<Input name="enable" type="dfeOffsetFix(1, 0, UNSIGNED)" />
-		<Input name="max" type="dfeOffsetFix(49, 0, UNSIGNED)" />
-		<Output latency="0" name="count" type="dfeOffsetFix(48, 0, UNSIGNED)" />
-		<Output latency="0" name="wrap" type="dfeOffsetFix(1, 0, UNSIGNED)" />
-		<Text>Counter(NUMERIC_INCREMENTING)\nInc: 1\nReset: 0\nInit: 0</Text>
-		<ResourceUsage DSPs="0" FFs="48" FMems="0" LUTs="48" />
-		<OriginStackTrace>com.maxeler.platform.max5.manager.Max5ManagerBase.addKernel(Unknown Source)
-perfmodels.StreamFMAManager.&lt;init&gt;(StreamFMAManager.maxj:13)
-perfmodels.StreamFMAManager.main(StreamFMAManager.maxj:20)</OriginStackTrace>
-		<Increment>1</Increment>
-		<WrapValue>0</WrapValue>
-		<InitValue>0</InitValue>
-		<CountMode>NUMERIC_INCREMENTING</CountMode>
-		<WrapMode>COUNT_LT_MAX_THEN_WRAP</WrapMode>
-	</Node>
-	<Edge criticalPaths="[]" dst_node_id="15" dst_node_input="input" src_node_id="14" src_node_output="count" />
-	<Node criticalPaths="[]" group="[]" id="15" isControl="false" isVisible="false" pipelineFactor="1.0" powerUsage="N/A" type="NodeStreamOffset">
-		<Input name="input" type="dfeOffsetFix(48, 0, UNSIGNED)" />
-		<Output latency="1" name="output" type="dfeOffsetFix(48, 0, UNSIGNED)" />
-		<Text>stream offset: 1</Text>
-		<ResourceUsage DSPs="0" FFs="0" FMems="0" LUTs="0" />
-		<OriginStackTrace>com.maxeler.platform.max5.manager.Max5ManagerBase.addKernel(Unknown Source)
-perfmodels.StreamFMAManager.&lt;init&gt;(StreamFMAManager.maxj:13)
-perfmodels.StreamFMAManager.main(StreamFMAManager.maxj:20)</OriginStackTrace>
-	</Node>
-	<Edge criticalPaths="[]" dst_node_id="17" dst_node_input="data" src_node_id="15" src_node_output="output" />
-	<Node criticalPaths="[]" group="[]" id="17" isControl="false" isVisible="false" pipelineFactor="1.0" powerUsage="N/A" type="NodeOutputMappedReg">
-		<Input name="load" type="dfeOffsetFix(1, 0, UNSIGNED)" />
-		<Input name="data" type="dfeOffsetFix(48, 0, UNSIGNED)" />
-		<Text>Scalar output (current_run_cycle_count)</Text>
-		<ResourceUsage DSPs="0" FFs="0" FMems="0" LUTs="0" />
-		<OriginStackTrace>com.maxeler.platform.max5.manager.Max5ManagerBase.addKernel(Unknown Source)
-perfmodels.StreamFMAManager.&lt;init&gt;(StreamFMAManager.maxj:13)
-perfmodels.StreamFMAManager.main(StreamFMAManager.maxj:20)</OriginStackTrace>
-		<Name>current_run_cycle_count</Name>
-	</Node>
-	<Node criticalPaths="[]" group="[]" id="25" isControl="false" isVisible="false" pipelineFactor="1.0" powerUsage="N/A" type="NodeConstantRawBits">
-		<Output latency="0" name="value" type="dfeOffsetFix(1, 0, UNSIGNED)" />
-		<Text>{HWOffsetFix:1, 0, UNSIGNED}\n0x1; 1.0</Text>
-		<ResourceUsage DSPs="0" FFs="0" FMems="0" LUTs="0" />
-		<OriginStackTrace>com.maxeler.platform.max5.manager.Max5ManagerBase.addKernel(Unknown Source)
-perfmodels.StreamFMAManager.&lt;init&gt;(StreamFMAManager.maxj:13)
-perfmodels.StreamFMAManager.main(StreamFMAManager.maxj:20)</OriginStackTrace>
-		<Value>1</Value>
-		<HexValue>0x1</HexValue>
-		<NumericValue>1.0</NumericValue>
-	</Node>
-	<Edge criticalPaths="[]" dst_node_id="20" dst_node_input="enable" src_node_id="25" src_node_output="value" />
-	<Node criticalPaths="[]" group="[]" id="19" isControl="false" isVisible="false" pipelineFactor="1.0" powerUsage="N/A" type="NodeConstantRawBits">
-		<Output latency="0" name="value" type="dfeOffsetFix(49, 0, UNSIGNED)" />
-		<Text>{HWOffsetFix:49, 0, UNSIGNED}\n0x1000000000000; 2.81474976710656E14</Text>
-		<ResourceUsage DSPs="0" FFs="0" FMems="0" LUTs="0" />
-		<OriginStackTrace>com.maxeler.platform.max5.manager.Max5ManagerBase.addKernel(Unknown Source)
-perfmodels.StreamFMAManager.&lt;init&gt;(StreamFMAManager.maxj:13)
-perfmodels.StreamFMAManager.main(StreamFMAManager.maxj:20)</OriginStackTrace>
-		<Value>1000000000000000000000000000000000000000000000000</Value>
-		<HexValue>0x1000000000000</HexValue>
-		<NumericValue>2.81474976710656E14</NumericValue>
-	</Node>
-	<Edge criticalPaths="[]" dst_node_id="20" dst_node_input="max" src_node_id="19" src_node_output="value" />
-	<Node criticalPaths="[]" group="[]" id="20" isControl="false" isVisible="false" pipelineFactor="1.0" powerUsage="N/A" type="NodeCounter">
-		<Input name="enable" type="dfeOffsetFix(1, 0, UNSIGNED)" />
-		<Input name="max" type="dfeOffsetFix(49, 0, UNSIGNED)" />
-		<Output latency="0" name="count" type="dfeOffsetFix(48, 0, UNSIGNED)" />
-		<Output latency="0" name="wrap" type="dfeOffsetFix(1, 0, UNSIGNED)" />
-		<Text>Counter(NUMERIC_INCREMENTING)\nInc: 1\nReset: 0\nInit: 0</Text>
-		<ResourceUsage DSPs="0" FFs="48" FMems="0" LUTs="48" />
-		<OriginStackTrace>com.maxeler.platform.max5.manager.Max5ManagerBase.addKernel(Unknown Source)
-perfmodels.StreamFMAManager.&lt;init&gt;(StreamFMAManager.maxj:13)
-perfmodels.StreamFMAManager.main(StreamFMAManager.maxj:20)</OriginStackTrace>
-		<Increment>1</Increment>
-		<WrapValue>0</WrapValue>
-		<InitValue>0</InitValue>
-		<CountMode>NUMERIC_INCREMENTING</CountMode>
-		<WrapMode>COUNT_LT_MAX_THEN_WRAP</WrapMode>
-	</Node>
-	<Edge criticalPaths="[]" dst_node_id="24" dst_node_input="a" src_node_id="20" src_node_output="count" />
-	<Node criticalPaths="[]" group="[]" id="22" isControl="true" isVisible="false" pipelineFactor="1.0" powerUsage="N/A" type="NodeInputMappedReg">
-		<Output latency="0" name="run_cycle_count" type="dfeOffsetFix(48, 0, UNSIGNED)" />
-		<Text>Scalar input (run_cycle_count)</Text>
-		<ResourceUsage DSPs="0" FFs="0" FMems="0" LUTs="0" />
-		<OriginStackTrace>com.maxeler.platform.max5.manager.Max5ManagerBase.addKernel(Unknown Source)
-perfmodels.StreamFMAManager.&lt;init&gt;(StreamFMAManager.maxj:13)
-perfmodels.StreamFMAManager.main(StreamFMAManager.maxj:20)</OriginStackTrace>
-		<Name>run_cycle_count</Name>
-	</Node>
-	<Edge criticalPaths="[]" dst_node_id="24" dst_node_input="b" src_node_id="22" src_node_output="run_cycle_count" />
-	<Node criticalPaths="[]" group="[]" id="24" isControl="false" isVisible="false" pipelineFactor="1.0" powerUsage="N/A" type="NodeEqInlined">
-		<Input name="a" type="dfeOffsetFix(48, 0, UNSIGNED)" />
-		<Input name="b" type="dfeOffsetFix(48, 0, UNSIGNED)" />
-		<Output latency="1" name="result" type="dfeOffsetFix(1, 0, UNSIGNED)" />
-		<Text>==</Text>
-		<ResourceUsage DSPs="0" FFs="1" FMems="0" LUTs="2" />
-		<OriginStackTrace>com.maxeler.platform.max5.manager.Max5ManagerBase.addKernel(Unknown Source)
-perfmodels.StreamFMAManager.&lt;init&gt;(StreamFMAManager.maxj:13)
-perfmodels.StreamFMAManager.main(StreamFMAManager.maxj:20)</OriginStackTrace>
-	</Node>
-	<Edge criticalPaths="[]" dst_node_id="21" dst_node_input="start" src_node_id="24" src_node_output="result" />
-	<Node criticalPaths="[]" group="[]" id="21" isControl="false" isVisible="false" pipelineFactor="1.0" powerUsage="N/A" type="NodeFlush">
-		<Input name="start" type="dfeOffsetFix(1, 0, UNSIGNED)" />
-		<Text>flush on trigger</Text>
-		<ResourceUsage DSPs="0" FFs="0" FMems="0" LUTs="0" />
-		<OriginStackTrace>com.maxeler.platform.max5.manager.Max5ManagerBase.addKernel(Unknown Source)
-perfmodels.StreamFMAManager.&lt;init&gt;(StreamFMAManager.maxj:13)
-perfmodels.StreamFMAManager.main(StreamFMAManager.maxj:20)</OriginStackTrace>
-	</Node>
-</Graph>

+ 0 - 280
tests/StreamFMA_MAX5C_DFE_SIM/scratch/StreamFMA-StreamFMAKernel-original.pxg

@@ -1,280 +0,0 @@
-<?xml version="1.0" encoding="UTF-8" ?>
-<Graph version="2018.3.1" pxg_version="2" maxfile_name="StreamFMA" design_name="StreamFMAKernel" compilation_phase="original" frequency="0,00">
-	<Node criticalPaths="[]" group="[]" id="7" isControl="false" isVisible="false" pipelineFactor="1.0" powerUsage="N/A" type="NodeConstantRawBits">
-		<Output latency="0" name="value" type="dfeOffsetFix(1, 0, UNSIGNED)" />
-		<Text>{HWOffsetFix:1, 0, UNSIGNED}\n0x1; 1.0</Text>
-		<ResourceUsage DSPs="0" FFs="0" FMems="0" LUTs="0" />
-		<OriginStackTrace>com.maxeler.maxcompiler.v2.kernelcompiler.stdlib.core.IO.output(IO.java:836)
-perfmodels.StreamFMAKernel.&lt;init&gt;(StreamFMAKernel.maxj:21)
-perfmodels.StreamFMAManager.&lt;init&gt;(StreamFMAManager.maxj:13)
-perfmodels.StreamFMAManager.main(StreamFMAManager.maxj:20)</OriginStackTrace>
-		<Value>1</Value>
-		<HexValue>0x1</HexValue>
-		<NumericValue>1.0</NumericValue>
-	</Node>
-	<Edge criticalPaths="[]" dst_node_id="10" dst_node_input="a" src_node_id="7" src_node_output="value" />
-	<Node criticalPaths="[]" group="[]" id="8" isControl="true" isVisible="false" pipelineFactor="1.0" powerUsage="N/A" type="NodeInputMappedReg">
-		<Output latency="0" name="io_output_force_disabled" type="dfeOffsetFix(1, 0, UNSIGNED)" />
-		<Text>Scalar input (io_output_force_disabled)</Text>
-		<ResourceUsage DSPs="0" FFs="0" FMems="0" LUTs="0" />
-		<OriginStackTrace>com.maxeler.maxcompiler.v2.kernelcompiler.stdlib.core.IO.output(IO.java:836)
-perfmodels.StreamFMAKernel.&lt;init&gt;(StreamFMAKernel.maxj:21)
-perfmodels.StreamFMAManager.&lt;init&gt;(StreamFMAManager.maxj:13)
-perfmodels.StreamFMAManager.main(StreamFMAManager.maxj:20)</OriginStackTrace>
-		<Name>io_output_force_disabled</Name>
-	</Node>
-	<Edge criticalPaths="[]" dst_node_id="9" dst_node_input="a" src_node_id="8" src_node_output="io_output_force_disabled" />
-	<Node criticalPaths="[]" group="[]" id="9" isControl="true" isVisible="false" pipelineFactor="0.0" powerUsage="N/A" type="NodeNot">
-		<Input name="a" type="dfeOffsetFix(1, 0, UNSIGNED)" />
-		<Output latency="0" name="result" type="dfeOffsetFix(1, 0, UNSIGNED)" />
-		<Text>~</Text>
-		<ResourceUsage DSPs="0" FFs="0" FMems="0" LUTs="0" />
-		<OriginStackTrace>com.maxeler.maxcompiler.v2.kernelcompiler.stdlib.core.IO.output(IO.java:836)
-perfmodels.StreamFMAKernel.&lt;init&gt;(StreamFMAKernel.maxj:21)
-perfmodels.StreamFMAManager.&lt;init&gt;(StreamFMAManager.maxj:13)
-perfmodels.StreamFMAManager.main(StreamFMAManager.maxj:20)</OriginStackTrace>
-	</Node>
-	<Edge criticalPaths="[]" dst_node_id="10" dst_node_input="b" src_node_id="9" src_node_output="result" />
-	<Node criticalPaths="[]" group="[]" id="10" isControl="false" isVisible="false" pipelineFactor="0.0" powerUsage="N/A" type="NodeAnd">
-		<Input name="a" type="dfeOffsetFix(1, 0, UNSIGNED)" />
-		<Input name="b" type="dfeOffsetFix(1, 0, UNSIGNED)" />
-		<Output latency="0" name="result" type="dfeOffsetFix(1, 0, UNSIGNED)" />
-		<Text>&amp;</Text>
-		<ResourceUsage DSPs="0" FFs="0" FMems="0" LUTs="1" />
-		<OriginStackTrace>com.maxeler.maxcompiler.v2.kernelcompiler.stdlib.core.IO.output(IO.java:836)
-perfmodels.StreamFMAKernel.&lt;init&gt;(StreamFMAKernel.maxj:21)
-perfmodels.StreamFMAManager.&lt;init&gt;(StreamFMAManager.maxj:13)
-perfmodels.StreamFMAManager.main(StreamFMAManager.maxj:20)</OriginStackTrace>
-	</Node>
-	<Edge criticalPaths="[]" dst_node_id="11" dst_node_input="output_control" src_node_id="10" src_node_output="result" />
-	<Node criticalPaths="[]" group="[]" id="0" isControl="true" isVisible="false" pipelineFactor="1.0" powerUsage="N/A" type="NodeInputMappedReg">
-		<Output latency="0" name="io_a_force_disabled" type="dfeOffsetFix(1, 0, UNSIGNED)" />
-		<Text>Scalar input (io_a_force_disabled)</Text>
-		<ResourceUsage DSPs="0" FFs="0" FMems="0" LUTs="0" />
-		<OriginStackTrace>com.maxeler.maxcompiler.v2.kernelcompiler.stdlib.core.IO.input(IO.java:630)
-perfmodels.StreamFMAKernel.&lt;init&gt;(StreamFMAKernel.maxj:15)
-perfmodels.StreamFMAManager.&lt;init&gt;(StreamFMAManager.maxj:13)
-perfmodels.StreamFMAManager.main(StreamFMAManager.maxj:20)</OriginStackTrace>
-		<Name>io_a_force_disabled</Name>
-	</Node>
-	<Edge criticalPaths="[]" dst_node_id="1" dst_node_input="a" src_node_id="0" src_node_output="io_a_force_disabled" />
-	<Node criticalPaths="[]" group="[]" id="1" isControl="true" isVisible="false" pipelineFactor="0.0" powerUsage="N/A" type="NodeNot">
-		<Input name="a" type="dfeOffsetFix(1, 0, UNSIGNED)" />
-		<Output latency="0" name="result" type="dfeOffsetFix(1, 0, UNSIGNED)" />
-		<Text>~</Text>
-		<ResourceUsage DSPs="0" FFs="0" FMems="0" LUTs="0" />
-		<OriginStackTrace>com.maxeler.maxcompiler.v2.kernelcompiler.stdlib.core.IO.input(IO.java:630)
-perfmodels.StreamFMAKernel.&lt;init&gt;(StreamFMAKernel.maxj:15)
-perfmodels.StreamFMAManager.&lt;init&gt;(StreamFMAManager.maxj:13)
-perfmodels.StreamFMAManager.main(StreamFMAManager.maxj:20)</OriginStackTrace>
-	</Node>
-	<Edge criticalPaths="[]" dst_node_id="2" dst_node_input="enable" src_node_id="1" src_node_output="result" />
-	<Node criticalPaths="[]" group="[]" id="2" isControl="false" isVisible="true" pipelineFactor="1.0" powerUsage="N/A" type="NodeInput">
-		<Input name="enable" type="dfeOffsetFix(1, 0, UNSIGNED)" />
-		<Output latency="5" name="data" type="dfeOffsetFix(32, 0, TWOSCOMPLEMENT)" />
-		<Text>Input(a)</Text>
-		<ResourceUsage DSPs="0" FFs="0" FMems="0" LUTs="0" />
-		<OriginStackTrace>com.maxeler.maxcompiler.v2.kernelcompiler.stdlib.core.IO.input(IO.java:630)
-perfmodels.StreamFMAKernel.&lt;init&gt;(StreamFMAKernel.maxj:15)
-perfmodels.StreamFMAManager.&lt;init&gt;(StreamFMAManager.maxj:13)
-perfmodels.StreamFMAManager.main(StreamFMAManager.maxj:20)</OriginStackTrace>
-		<Name>a</Name>
-	</Node>
-	<Edge criticalPaths="[]" dst_node_id="6" dst_node_input="a" src_node_id="2" src_node_output="data" />
-	<Node criticalPaths="[]" group="[]" id="3" isControl="true" isVisible="false" pipelineFactor="1.0" powerUsage="N/A" type="NodeInputMappedReg">
-		<Output latency="0" name="io_b_force_disabled" type="dfeOffsetFix(1, 0, UNSIGNED)" />
-		<Text>Scalar input (io_b_force_disabled)</Text>
-		<ResourceUsage DSPs="0" FFs="0" FMems="0" LUTs="0" />
-		<OriginStackTrace>com.maxeler.maxcompiler.v2.kernelcompiler.stdlib.core.IO.input(IO.java:630)
-perfmodels.StreamFMAKernel.&lt;init&gt;(StreamFMAKernel.maxj:16)
-perfmodels.StreamFMAManager.&lt;init&gt;(StreamFMAManager.maxj:13)
-perfmodels.StreamFMAManager.main(StreamFMAManager.maxj:20)</OriginStackTrace>
-		<Name>io_b_force_disabled</Name>
-	</Node>
-	<Edge criticalPaths="[]" dst_node_id="4" dst_node_input="a" src_node_id="3" src_node_output="io_b_force_disabled" />
-	<Node criticalPaths="[]" group="[]" id="4" isControl="true" isVisible="false" pipelineFactor="0.0" powerUsage="N/A" type="NodeNot">
-		<Input name="a" type="dfeOffsetFix(1, 0, UNSIGNED)" />
-		<Output latency="0" name="result" type="dfeOffsetFix(1, 0, UNSIGNED)" />
-		<Text>~</Text>
-		<ResourceUsage DSPs="0" FFs="0" FMems="0" LUTs="0" />
-		<OriginStackTrace>com.maxeler.maxcompiler.v2.kernelcompiler.stdlib.core.IO.input(IO.java:630)
-perfmodels.StreamFMAKernel.&lt;init&gt;(StreamFMAKernel.maxj:16)
-perfmodels.StreamFMAManager.&lt;init&gt;(StreamFMAManager.maxj:13)
-perfmodels.StreamFMAManager.main(StreamFMAManager.maxj:20)</OriginStackTrace>
-	</Node>
-	<Edge criticalPaths="[]" dst_node_id="5" dst_node_input="enable" src_node_id="4" src_node_output="result" />
-	<Node criticalPaths="[]" group="[]" id="5" isControl="false" isVisible="true" pipelineFactor="1.0" powerUsage="N/A" type="NodeInput">
-		<Input name="enable" type="dfeOffsetFix(1, 0, UNSIGNED)" />
-		<Output latency="5" name="data" type="dfeOffsetFix(32, 0, TWOSCOMPLEMENT)" />
-		<Text>Input(b)</Text>
-		<ResourceUsage DSPs="0" FFs="0" FMems="0" LUTs="0" />
-		<OriginStackTrace>com.maxeler.maxcompiler.v2.kernelcompiler.stdlib.core.IO.input(IO.java:630)
-perfmodels.StreamFMAKernel.&lt;init&gt;(StreamFMAKernel.maxj:16)
-perfmodels.StreamFMAManager.&lt;init&gt;(StreamFMAManager.maxj:13)
-perfmodels.StreamFMAManager.main(StreamFMAManager.maxj:20)</OriginStackTrace>
-		<Name>b</Name>
-	</Node>
-	<Edge criticalPaths="[]" dst_node_id="6" dst_node_input="b" src_node_id="5" src_node_output="data" />
-	<Node criticalPaths="[]" group="[]" id="6" isControl="false" isVisible="true" pipelineFactor="1.0" powerUsage="N/A" type="NodeAdd">
-		<Input name="a" type="dfeOffsetFix(32, 0, TWOSCOMPLEMENT)" />
-		<Input name="b" type="dfeOffsetFix(32, 0, TWOSCOMPLEMENT)" />
-		<Output latency="1" name="result" type="dfeOffsetFix(32, 0, TWOSCOMPLEMENT)" />
-		<Text>+</Text>
-		<ResourceUsage DSPs="0" FFs="32" FMems="0" LUTs="64" />
-		<OriginStackTrace>com.maxeler.maxcompiler.v2.kernelcompiler.types.base.DFEVar.add(DFEVar.java:1010)
-perfmodels.StreamFMAKernel.&lt;init&gt;(StreamFMAKernel.maxj:19)
-perfmodels.StreamFMAManager.&lt;init&gt;(StreamFMAManager.maxj:13)
-perfmodels.StreamFMAManager.main(StreamFMAManager.maxj:20)</OriginStackTrace>
-	</Node>
-	<Edge criticalPaths="[]" dst_node_id="11" dst_node_input="data" src_node_id="6" src_node_output="result" />
-	<Node criticalPaths="[]" group="[]" id="11" isControl="false" isVisible="true" pipelineFactor="1.0" powerUsage="N/A" type="NodeOutput">
-		<Input name="output_control" type="dfeOffsetFix(1, 0, UNSIGNED)" />
-		<Input name="data" type="dfeOffsetFix(32, 0, TWOSCOMPLEMENT)" />
-		<Text>Output(output)</Text>
-		<ResourceUsage DSPs="0" FFs="0" FMems="0" LUTs="0" />
-		<OriginStackTrace>com.maxeler.maxcompiler.v2.kernelcompiler.stdlib.core.IO.output(IO.java:836)
-perfmodels.StreamFMAKernel.&lt;init&gt;(StreamFMAKernel.maxj:21)
-perfmodels.StreamFMAManager.&lt;init&gt;(StreamFMAManager.maxj:13)
-perfmodels.StreamFMAManager.main(StreamFMAManager.maxj:20)</OriginStackTrace>
-		<Name>output</Name>
-	</Node>
-	<Node criticalPaths="[]" group="[]" id="16" isControl="false" isVisible="false" pipelineFactor="1.0" powerUsage="N/A" type="NodeConstantRawBits">
-		<Output latency="0" name="value" type="dfeOffsetFix(1, 0, UNSIGNED)" />
-		<Text>{HWOffsetFix:1, 0, UNSIGNED}\n0x1; 1.0</Text>
-		<ResourceUsage DSPs="0" FFs="0" FMems="0" LUTs="0" />
-		<OriginStackTrace>com.maxeler.platform.max5.manager.Max5ManagerBase.addKernel(Unknown Source)
-perfmodels.StreamFMAManager.&lt;init&gt;(StreamFMAManager.maxj:13)
-perfmodels.StreamFMAManager.main(StreamFMAManager.maxj:20)</OriginStackTrace>
-		<Value>1</Value>
-		<HexValue>0x1</HexValue>
-		<NumericValue>1.0</NumericValue>
-	</Node>
-	<Edge criticalPaths="[]" dst_node_id="17" dst_node_input="load" src_node_id="16" src_node_output="value" />
-	<Node criticalPaths="[]" group="[]" id="12" isControl="false" isVisible="false" pipelineFactor="1.0" powerUsage="N/A" type="NodeConstantDouble">
-		<Output latency="0" name="value" type="dfeUntypedConst()" />
-		<Text>1.0</Text>
-		<ResourceUsage DSPs="0" FFs="0" FMems="0" LUTs="0" />
-		<OriginStackTrace>com.maxeler.platform.max5.manager.Max5ManagerBase.addKernel(Unknown Source)
-perfmodels.StreamFMAManager.&lt;init&gt;(StreamFMAManager.maxj:13)
-perfmodels.StreamFMAManager.main(StreamFMAManager.maxj:20)</OriginStackTrace>
-		<Value>1.0</Value>
-	</Node>
-	<Edge criticalPaths="[]" dst_node_id="14" dst_node_input="enable" src_node_id="12" src_node_output="value" />
-	<Node criticalPaths="[]" group="[]" id="13" isControl="false" isVisible="false" pipelineFactor="1.0" powerUsage="N/A" type="NodeConstantRawBits">
-		<Output latency="0" name="value" type="dfeOffsetFix(49, 0, UNSIGNED)" />
-		<Text>{HWOffsetFix:49, 0, UNSIGNED}\n0x1000000000000; 2.81474976710656E14</Text>
-		<ResourceUsage DSPs="0" FFs="0" FMems="0" LUTs="0" />
-		<OriginStackTrace>com.maxeler.platform.max5.manager.Max5ManagerBase.addKernel(Unknown Source)
-perfmodels.StreamFMAManager.&lt;init&gt;(StreamFMAManager.maxj:13)
-perfmodels.StreamFMAManager.main(StreamFMAManager.maxj:20)</OriginStackTrace>
-		<Value>1000000000000000000000000000000000000000000000000</Value>
-		<HexValue>0x1000000000000</HexValue>
-		<NumericValue>2.81474976710656E14</NumericValue>
-	</Node>
-	<Edge criticalPaths="[]" dst_node_id="14" dst_node_input="max" src_node_id="13" src_node_output="value" />
-	<Node criticalPaths="[]" group="[]" id="14" isControl="false" isVisible="false" pipelineFactor="1.0" powerUsage="N/A" type="NodeCounter">
-		<Input name="enable" type="dfeOffsetFix(1, 0, UNSIGNED)" />
-		<Input name="max" type="dfeOffsetFix(49, 0, UNSIGNED)" />
-		<Output latency="0" name="count" type="dfeOffsetFix(48, 0, UNSIGNED)" />
-		<Output latency="0" name="wrap" type="dfeOffsetFix(1, 0, UNSIGNED)" />
-		<Text>Counter(NUMERIC_INCREMENTING)\nInc: 1\nReset: 0\nInit: 0</Text>
-		<ResourceUsage DSPs="0" FFs="48" FMems="0" LUTs="48" />
-		<OriginStackTrace>com.maxeler.platform.max5.manager.Max5ManagerBase.addKernel(Unknown Source)
-perfmodels.StreamFMAManager.&lt;init&gt;(StreamFMAManager.maxj:13)
-perfmodels.StreamFMAManager.main(StreamFMAManager.maxj:20)</OriginStackTrace>
-		<Increment>1</Increment>
-		<WrapValue>0</WrapValue>
-		<InitValue>0</InitValue>
-		<CountMode>NUMERIC_INCREMENTING</CountMode>
-		<WrapMode>COUNT_LT_MAX_THEN_WRAP</WrapMode>
-	</Node>
-	<Edge criticalPaths="[]" dst_node_id="15" dst_node_input="input" src_node_id="14" src_node_output="count" />
-	<Node criticalPaths="[]" group="[]" id="15" isControl="false" isVisible="false" pipelineFactor="1.0" powerUsage="N/A" type="NodeStreamOffset">
-		<Input name="input" type="dfeOffsetFix(48, 0, UNSIGNED)" />
-		<Output latency="1" name="output" type="dfeOffsetFix(48, 0, UNSIGNED)" />
-		<Text>stream offset: 1</Text>
-		<ResourceUsage DSPs="0" FFs="0" FMems="0" LUTs="0" />
-		<OriginStackTrace>com.maxeler.platform.max5.manager.Max5ManagerBase.addKernel(Unknown Source)
-perfmodels.StreamFMAManager.&lt;init&gt;(StreamFMAManager.maxj:13)
-perfmodels.StreamFMAManager.main(StreamFMAManager.maxj:20)</OriginStackTrace>
-	</Node>
-	<Edge criticalPaths="[]" dst_node_id="17" dst_node_input="data" src_node_id="15" src_node_output="output" />
-	<Node criticalPaths="[]" group="[]" id="17" isControl="false" isVisible="false" pipelineFactor="1.0" powerUsage="N/A" type="NodeOutputMappedReg">
-		<Input name="load" type="dfeOffsetFix(1, 0, UNSIGNED)" />
-		<Input name="data" type="dfeOffsetFix(48, 0, UNSIGNED)" />
-		<Text>Scalar output (current_run_cycle_count)</Text>
-		<ResourceUsage DSPs="0" FFs="0" FMems="0" LUTs="0" />
-		<OriginStackTrace>com.maxeler.platform.max5.manager.Max5ManagerBase.addKernel(Unknown Source)
-perfmodels.StreamFMAManager.&lt;init&gt;(StreamFMAManager.maxj:13)
-perfmodels.StreamFMAManager.main(StreamFMAManager.maxj:20)</OriginStackTrace>
-		<Name>current_run_cycle_count</Name>
-	</Node>
-	<Node criticalPaths="[]" group="[]" id="18" isControl="false" isVisible="false" pipelineFactor="1.0" powerUsage="N/A" type="NodeConstantDouble">
-		<Output latency="0" name="value" type="dfeUntypedConst()" />
-		<Text>1.0</Text>
-		<ResourceUsage DSPs="0" FFs="0" FMems="0" LUTs="0" />
-		<OriginStackTrace>com.maxeler.platform.max5.manager.Max5ManagerBase.addKernel(Unknown Source)
-perfmodels.StreamFMAManager.&lt;init&gt;(StreamFMAManager.maxj:13)
-perfmodels.StreamFMAManager.main(StreamFMAManager.maxj:20)</OriginStackTrace>
-		<Value>1.0</Value>
-	</Node>
-	<Edge criticalPaths="[]" dst_node_id="20" dst_node_input="enable" src_node_id="18" src_node_output="value" />
-	<Node criticalPaths="[]" group="[]" id="19" isControl="false" isVisible="false" pipelineFactor="1.0" powerUsage="N/A" type="NodeConstantRawBits">
-		<Output latency="0" name="value" type="dfeOffsetFix(49, 0, UNSIGNED)" />
-		<Text>{HWOffsetFix:49, 0, UNSIGNED}\n0x1000000000000; 2.81474976710656E14</Text>
-		<ResourceUsage DSPs="0" FFs="0" FMems="0" LUTs="0" />
-		<OriginStackTrace>com.maxeler.platform.max5.manager.Max5ManagerBase.addKernel(Unknown Source)
-perfmodels.StreamFMAManager.&lt;init&gt;(StreamFMAManager.maxj:13)
-perfmodels.StreamFMAManager.main(StreamFMAManager.maxj:20)</OriginStackTrace>
-		<Value>1000000000000000000000000000000000000000000000000</Value>
-		<HexValue>0x1000000000000</HexValue>
-		<NumericValue>2.81474976710656E14</NumericValue>
-	</Node>
-	<Edge criticalPaths="[]" dst_node_id="20" dst_node_input="max" src_node_id="19" src_node_output="value" />
-	<Node criticalPaths="[]" group="[]" id="20" isControl="false" isVisible="false" pipelineFactor="1.0" powerUsage="N/A" type="NodeCounter">
-		<Input name="enable" type="dfeOffsetFix(1, 0, UNSIGNED)" />
-		<Input name="max" type="dfeOffsetFix(49, 0, UNSIGNED)" />
-		<Output latency="0" name="count" type="dfeOffsetFix(48, 0, UNSIGNED)" />
-		<Output latency="0" name="wrap" type="dfeOffsetFix(1, 0, UNSIGNED)" />
-		<Text>Counter(NUMERIC_INCREMENTING)\nInc: 1\nReset: 0\nInit: 0</Text>
-		<ResourceUsage DSPs="0" FFs="48" FMems="0" LUTs="48" />
-		<OriginStackTrace>com.maxeler.platform.max5.manager.Max5ManagerBase.addKernel(Unknown Source)
-perfmodels.StreamFMAManager.&lt;init&gt;(StreamFMAManager.maxj:13)
-perfmodels.StreamFMAManager.main(StreamFMAManager.maxj:20)</OriginStackTrace>
-		<Increment>1</Increment>
-		<WrapValue>0</WrapValue>
-		<InitValue>0</InitValue>
-		<CountMode>NUMERIC_INCREMENTING</CountMode>
-		<WrapMode>COUNT_LT_MAX_THEN_WRAP</WrapMode>
-	</Node>
-	<Edge criticalPaths="[]" dst_node_id="23" dst_node_input="a" src_node_id="20" src_node_output="count" />
-	<Node criticalPaths="[]" group="[]" id="22" isControl="true" isVisible="false" pipelineFactor="1.0" powerUsage="N/A" type="NodeInputMappedReg">
-		<Output latency="0" name="run_cycle_count" type="dfeOffsetFix(48, 0, UNSIGNED)" />
-		<Text>Scalar input (run_cycle_count)</Text>
-		<ResourceUsage DSPs="0" FFs="0" FMems="0" LUTs="0" />
-		<OriginStackTrace>com.maxeler.platform.max5.manager.Max5ManagerBase.addKernel(Unknown Source)
-perfmodels.StreamFMAManager.&lt;init&gt;(StreamFMAManager.maxj:13)
-perfmodels.StreamFMAManager.main(StreamFMAManager.maxj:20)</OriginStackTrace>
-		<Name>run_cycle_count</Name>
-	</Node>
-	<Edge criticalPaths="[]" dst_node_id="23" dst_node_input="b" src_node_id="22" src_node_output="run_cycle_count" />
-	<Node criticalPaths="[]" group="[]" id="23" isControl="false" isVisible="false" pipelineFactor="1.0" powerUsage="N/A" type="NodeEq">
-		<Input name="a" type="dfeOffsetFix(48, 0, UNSIGNED)" />
-		<Input name="b" type="dfeOffsetFix(48, 0, UNSIGNED)" />
-		<Output latency="1" name="result" type="dfeOffsetFix(1, 0, UNSIGNED)" />
-		<Text>==</Text>
-		<ResourceUsage DSPs="0" FFs="1" FMems="0" LUTs="2" />
-		<OriginStackTrace>com.maxeler.platform.max5.manager.Max5ManagerBase.addKernel(Unknown Source)
-perfmodels.StreamFMAManager.&lt;init&gt;(StreamFMAManager.maxj:13)
-perfmodels.StreamFMAManager.main(StreamFMAManager.maxj:20)</OriginStackTrace>
-	</Node>
-	<Edge criticalPaths="[]" dst_node_id="21" dst_node_input="start" src_node_id="23" src_node_output="result" />
-	<Node criticalPaths="[]" group="[]" id="21" isControl="false" isVisible="false" pipelineFactor="1.0" powerUsage="N/A" type="NodeFlush">
-		<Input name="start" type="dfeOffsetFix(1, 0, UNSIGNED)" />
-		<Text>flush on trigger</Text>
-		<ResourceUsage DSPs="0" FFs="0" FMems="0" LUTs="0" />
-		<OriginStackTrace>com.maxeler.platform.max5.manager.Max5ManagerBase.addKernel(Unknown Source)
-perfmodels.StreamFMAManager.&lt;init&gt;(StreamFMAManager.maxj:13)
-perfmodels.StreamFMAManager.main(StreamFMAManager.maxj:20)</OriginStackTrace>
-	</Node>
-</Graph>

+ 0 - 188
tests/StreamFMA_MAX5C_DFE_SIM/scratch/StreamFMA.h

@@ -1,188 +0,0 @@
-/**\file */
-#ifndef SLIC_DECLARATIONS_StreamFMA_H
-#define SLIC_DECLARATIONS_StreamFMA_H
-#include "MaxSLiCInterface.h"
-#ifdef __cplusplus
-extern "C" {
-#endif /* __cplusplus */
-
-#define StreamFMA_DYNAMIC_CLOCKS_ENABLED (0)
-#define StreamFMA_PCIE_ALIGNMENT (16)
-
-
-/*----------------------------------------------------------------------------*/
-/*---------------------------- Interface default -----------------------------*/
-/*----------------------------------------------------------------------------*/
-
-
-
-
-/**
- * \brief Basic static function for the interface 'default'.
- * 
- * \param [in] ticks_StreamFMAKernel The number of ticks for which kernel "StreamFMAKernel" will run.
- * \param [in] instream_a Stream "a".
- * \param [in] instream_size_a The size of the stream instream_a in bytes.
- * \param [in] instream_b Stream "b".
- * \param [in] instream_size_b The size of the stream instream_b in bytes.
- * \param [out] outstream_output Stream "output".
- * \param [in] outstream_size_output The size of the stream outstream_output in bytes.
- */
-void StreamFMA(
-	uint64_t ticks_StreamFMAKernel,
-	const void *instream_a,
-	size_t instream_size_a,
-	const void *instream_b,
-	size_t instream_size_b,
-	void *outstream_output,
-	size_t outstream_size_output);
-
-/**
- * \brief Basic static non-blocking function for the interface 'default'.
- * 
- * Schedule to run on an engine and return immediately.
- * The status of the run can be checked either by ::max_wait or ::max_nowait;
- * note that one of these *must* be called, so that associated memory can be released.
- * 
- * 
- * \param [in] ticks_StreamFMAKernel The number of ticks for which kernel "StreamFMAKernel" will run.
- * \param [in] instream_a Stream "a".
- * \param [in] instream_size_a The size of the stream instream_a in bytes.
- * \param [in] instream_b Stream "b".
- * \param [in] instream_size_b The size of the stream instream_b in bytes.
- * \param [out] outstream_output Stream "output".
- * \param [in] outstream_size_output The size of the stream outstream_output in bytes.
- * \return A handle on the execution status, or NULL in case of error.
- */
-max_run_t *StreamFMA_nonblock(
-	uint64_t ticks_StreamFMAKernel,
-	const void *instream_a,
-	size_t instream_size_a,
-	const void *instream_b,
-	size_t instream_size_b,
-	void *outstream_output,
-	size_t outstream_size_output);
-
-/**
- * \brief Advanced static interface, structure for the engine interface 'default'
- * 
- */
-typedef struct { 
-	uint64_t ticks_StreamFMAKernel; /**<  [in] The number of ticks for which kernel "StreamFMAKernel" will run. */
-	const void *instream_a; /**<  [in] Stream "a". */
-	size_t instream_size_a; /**<  [in] The size of the stream instream_a in bytes. */
-	const void *instream_b; /**<  [in] Stream "b". */
-	size_t instream_size_b; /**<  [in] The size of the stream instream_b in bytes. */
-	void *outstream_output; /**<  [out] Stream "output". */
-	size_t outstream_size_output; /**<  [in] The size of the stream outstream_output in bytes. */
-} StreamFMA_actions_t;
-
-/**
- * \brief Advanced static function for the interface 'default'.
- * 
- * \param [in] engine The engine on which the actions will be executed.
- * \param [in,out] interface_actions Actions to be executed.
- */
-void StreamFMA_run(
-	max_engine_t *engine,
-	StreamFMA_actions_t *interface_actions);
-
-/**
- * \brief Advanced static non-blocking function for the interface 'default'.
- *
- * Schedule the actions to run on the engine and return immediately.
- * The status of the run can be checked either by ::max_wait or ::max_nowait;
- * note that one of these *must* be called, so that associated memory can be released.
- *
- * 
- * \param [in] engine The engine on which the actions will be executed.
- * \param [in] interface_actions Actions to be executed.
- * \return A handle on the execution status of the actions, or NULL in case of error.
- */
-max_run_t *StreamFMA_run_nonblock(
-	max_engine_t *engine,
-	StreamFMA_actions_t *interface_actions);
-
-/**
- * \brief Group run advanced static function for the interface 'default'.
- * 
- * \param [in] group Group to use.
- * \param [in,out] interface_actions Actions to run.
- *
- * Run the actions on the first device available in the group.
- */
-void StreamFMA_run_group(max_group_t *group, StreamFMA_actions_t *interface_actions);
-
-/**
- * \brief Group run advanced static non-blocking function for the interface 'default'.
- * 
- *
- * Schedule the actions to run on the first device available in the group and return immediately.
- * The status of the run must be checked with ::max_wait. 
- * Note that use of ::max_nowait is prohibited with non-blocking running on groups:
- * see the ::max_run_group_nonblock documentation for more explanation.
- *
- * \param [in] group Group to use.
- * \param [in] interface_actions Actions to run.
- * \return A handle on the execution status of the actions, or NULL in case of error.
- */
-max_run_t *StreamFMA_run_group_nonblock(max_group_t *group, StreamFMA_actions_t *interface_actions);
-
-/**
- * \brief Array run advanced static function for the interface 'default'.
- * 
- * \param [in] engarray The array of devices to use.
- * \param [in,out] interface_actions The array of actions to run.
- *
- * Run the array of actions on the array of engines.  The length of interface_actions
- * must match the size of engarray.
- */
-void StreamFMA_run_array(max_engarray_t *engarray, StreamFMA_actions_t *interface_actions[]);
-
-/**
- * \brief Array run advanced static non-blocking function for the interface 'default'.
- * 
- *
- * Schedule to run the array of actions on the array of engines, and return immediately.
- * The length of interface_actions must match the size of engarray.
- * The status of the run can be checked either by ::max_wait or ::max_nowait;
- * note that one of these *must* be called, so that associated memory can be released.
- *
- * \param [in] engarray The array of devices to use.
- * \param [in] interface_actions The array of actions to run.
- * \return A handle on the execution status of the actions, or NULL in case of error.
- */
-max_run_t *StreamFMA_run_array_nonblock(max_engarray_t *engarray, StreamFMA_actions_t *interface_actions[]);
-
-/**
- * \brief Converts a static-interface action struct into a dynamic-interface max_actions_t struct.
- *
- * Note that this is an internal utility function used by other functions in the static interface.
- *
- * \param [in] maxfile The maxfile to use.
- * \param [in] interface_actions The interface-specific actions to run.
- * \return The dynamic-interface actions to run, or NULL in case of error.
- */
-max_actions_t* StreamFMA_convert(max_file_t *maxfile, StreamFMA_actions_t *interface_actions);
-
-/**
- * \brief Initialise a maxfile.
- */
-max_file_t* StreamFMA_init(void);
-
-/* Error handling functions */
-int StreamFMA_has_errors(void);
-const char* StreamFMA_get_errors(void);
-void StreamFMA_clear_errors(void);
-/* Free statically allocated maxfile data */
-void StreamFMA_free(void);
-/* returns: -1 = error running command; 0 = no error reported */
-int StreamFMA_simulator_start(void);
-/* returns: -1 = error running command; 0 = no error reported */
-int StreamFMA_simulator_stop(void);
-
-#ifdef __cplusplus
-}
-#endif /* __cplusplus */
-#endif /* SLIC_DECLARATIONS_StreamFMA_H */
-

File diff suppressed because it is too large
+ 0 - 2895
tests/StreamFMA_MAX5C_DFE_SIM/scratch/StreamFMA.max


File diff suppressed because it is too large
+ 0 - 1
tests/StreamFMA_MAX5C_DFE_SIM/scratch/StreamFMA.xml


+ 0 - 22
tests/StreamFMA_MAX5C_DFE_SIM/scratch/StreamFMAKernel.graphs

@@ -1,22 +0,0 @@
-Tue Oct 29 11:40:15 CET 2019
-StreamFMAKernel
-original
-StreamFMAKernel_original.dot
-pre_dsp_extraction
-StreamFMAKernel_pre_dsp_extraction.dot
-post_dsp_extraction
-StreamFMAKernel_post_dsp_extraction.dot
-post_tri_add_extraction
-StreamFMAKernel_post_tri_add_extraction.dot
-pre_condadd_extraction
-StreamFMAKernel_pre_condadd_extraction.dot
-optimised
-StreamFMAKernel_optimised.dot
-tapnfold_1
-StreamFMAKernel_tapnfold_1.dot
-validated_fifos
-StreamFMAKernel_validated_fifos.dot
-tapnfold_2
-StreamFMAKernel_tapnfold_2.dot
-final
-StreamFMAKernel_final.dot

+ 0 - 0
tests/StreamFMA_MAX5C_DFE_SIM/scratch/StreamFMAKernel_Assertions.h


+ 0 - 61
tests/StreamFMA_MAX5C_DFE_SIM/scratch/StreamFMAKernel_Configuration.txt

@@ -1,61 +0,0 @@
-KernelConfiguration.additionalInputPipelining = 64                                          [Init: 64]
-KernelConfiguration.allowDSPCascading = true                                                [Init: true]
-KernelConfiguration.allowInputsOutputsBeforeFlushNode = false                               [Init: false]
-KernelConfiguration.allowZeroLatencyNodeHold = false                                        [Init: false]
-KernelConfiguration.bramBitsThreshold = 2080                                                [Init: 2080]
-KernelConfiguration.buildTarget = MAXCOMPILERSIM_HOST_DRIVEN                                [Init: NONE, change: MAXCOMPILERSIM_HOST_DRIVEN]
-KernelConfiguration.cePipelining = 2                                                        [Init: 2]
-KernelConfiguration.clockPhaseBalanceThreshold = 0.1                                        [Init: 0.1]
-KernelConfiguration.clockPhasingRetries = 50                                                [Init: 50]
-KernelConfiguration.constantMultiplicationWithShiftAddThreshold = 3                         [Init: 3]
-KernelConfiguration.dumpNeighboursString =                                                  [Init: ]
-KernelConfiguration.enableCeReplication = true                                              [Init: true]
-KernelConfiguration.enableClockPhasePartitioning = false                                    [Init: false]
-KernelConfiguration.enableDebugIOControlRegs = true                                         [Init: true]
-KernelConfiguration.enableDummyBuild = false                                                [Init: false]
-KernelConfiguration.enableKernelProfiler = false                                            [Init: false]
-KernelConfiguration.enablePipelinedComputeController = false                                [Init: false]
-KernelConfiguration.enableShadowRegister = false                                            [Init: false]
-KernelConfiguration.enableSmartKernelControl = false                                        [Init: false]
-KernelConfiguration.fifoSrlRegisterStages = 1                                               [Init: 1]
-KernelConfiguration.flushOnInputDataCongtiguous = false                                     [Init: false]
-KernelConfiguration.hardwareDebugDepth = 512                                                [Init: 512]
-KernelConfiguration.hwHierarchyMode = UNSET                                                 [Init: UNSET]
-KernelConfiguration.latencyAnnotation = true                                                [Init: true]
-KernelConfiguration.latencyAnnotationAll = true                                             [Init: true]
-KernelConfiguration.latencyAnnotationIOs =                                                  [Init: null]
-KernelConfiguration.maxCoalescedFifoWidth = 2147483647                                      [Init: 2147483647]
-KernelConfiguration.maxPreAdderFanOut = 1                                                   [Init: 1]
-KernelConfiguration.netlistMode = false                                                     [Init: false]
-KernelConfiguration.numPhotonStateMachines = 1                                              [Init: 1]
-KernelConfiguration.optimizations.ceCounterRegisterDuplication = 1                          [Init: 1]
-KernelConfiguration.optimizations.conditionalArithmetic = true                              [Init: true]
-KernelConfiguration.optimizations.counterChainWrapPipelining = 0                            [Init: 0]
-KernelConfiguration.optimizations.dspAddChain = OPTIMISE                                    [Init: null, change: OPTIMISE]
-KernelConfiguration.optimizations.enableActiveFanoutReduction = false                       [Init: false]
-KernelConfiguration.optimizations.enableBUFGCE = false                                      [Init: false]
-KernelConfiguration.optimizations.enableBetterInputRegistering = false                      [Init: false]
-KernelConfiguration.optimizations.enableBetterRegistering = false                           [Init: false]
-KernelConfiguration.optimizations.enableFIFOCoalescingAcrossPlacementConstraints = false    [Init: false]
-KernelConfiguration.optimizations.enableFifoCoalescing = true                               [Init: true]
-KernelConfiguration.optimizations.enableIntegratedRounding = false                          [Init: false]
-KernelConfiguration.optimizations.enableMappedMemoryHostReadBack = true                     [Init: true]
-KernelConfiguration.optimizations.enableMultiCycleReset = false                             [Init: false]
-KernelConfiguration.optimizations.enablePowerTwoFloatMult = true                            [Init: true]
-KernelConfiguration.optimizations.enableRedundantNodeDeletion = true                        [Init: true]
-KernelConfiguration.optimizations.enableStateMachineRegisterMerging = true                  [Init: true]
-KernelConfiguration.optimizations.inlining = false                                          [Init: false]
-KernelConfiguration.optimizations.inputFlushDistanceFactor = 0                              [Init: 0]
-KernelConfiguration.optimizations.minimumStaticFIFOSplitDepth = 1                           [Init: 1]
-KernelConfiguration.optimizations.optimizationTechnique = DEFAULT                           [Init: DEFAULT]
-KernelConfiguration.optimizations.preserveNodeRegisters = true                              [Init: true]
-KernelConfiguration.optimizations.triAdd = true                                             [Init: true]
-KernelConfiguration.partialReconfBlockName =                                                [Init: ]
-KernelConfiguration.partialReconfMode = false                                               [Init: false]
-KernelConfiguration.partialReconfTemplate = false                                           [Init: false]
-KernelConfiguration.replicateNodeCeLog2NumPartitions = 0                                    [Init: 0]
-KernelConfiguration.romBRAMBitsThreshold = 2080                                             [Init: 2080]
-KernelConfiguration.simulation.ramAddressCollisionBehaviour = EXCEPTION                     [Init: EXCEPTION]
-KernelConfiguration.simulation.ramOutOfBoundsAccessBehaviour = EXCEPTION                    [Init: EXCEPTION]
-KernelConfiguration.simulation.simProgressMessageFrequency = 0                              [Init: 0]
-KernelConfiguration.useAsapScheduler = false                                                [Init: false]

+ 0 - 9
tests/StreamFMA_MAX5C_DFE_SIM/scratch/StreamFMAKernel_CriticalPath_a_to_output.dot

@@ -1,9 +0,0 @@
-digraph StreamFMAKernel_CriticalPath_a_to_output{
-	NodeInput2 [color=red, style="bold, filled", fillcolor=yellow, shape=invhouse, label="a\nID: 2"];
-	NodeInput5 [shape=invhouse, label="b\nID: 5"];
-	NodeAdd6 [color=red, style="bold, filled", fillcolor=yellow, label="+\nID: 6"];
-	NodeOutput11 [color=red, style="bold, filled", fillcolor=yellow, shape=house, label="output\nID: 11"];
-	NodeInput2 -> NodeAdd6[color=red style=bold photon_data="EDGE,SrcNode:2,SrcNodePort:data"];
-	NodeInput5 -> NodeAdd6[color="/dark28/1" photon_data="EDGE,SrcNode:5,SrcNodePort:data"];
-	NodeAdd6 -> NodeOutput11[color=red style=bold photon_data="EDGE,SrcNode:6,SrcNodePort:result"];
-}

+ 0 - 9
tests/StreamFMA_MAX5C_DFE_SIM/scratch/StreamFMAKernel_CriticalPath_b_to_output.dot

@@ -1,9 +0,0 @@
-digraph StreamFMAKernel_CriticalPath_b_to_output{
-	NodeInput2 [shape=invhouse, label="a\nID: 2"];
-	NodeInput5 [color=red, style="bold, filled", fillcolor=yellow, shape=invhouse, label="b\nID: 5"];
-	NodeAdd6 [color=red, style="bold, filled", fillcolor=yellow, label="+\nID: 6"];
-	NodeOutput11 [color=red, style="bold, filled", fillcolor=yellow, shape=house, label="output\nID: 11"];
-	NodeInput2 -> NodeAdd6[color="/dark28/1" photon_data="EDGE,SrcNode:2,SrcNodePort:data"];
-	NodeInput5 -> NodeAdd6[color=red style=bold photon_data="EDGE,SrcNode:5,SrcNodePort:data"];
-	NodeAdd6 -> NodeOutput11[color=red style=bold photon_data="EDGE,SrcNode:6,SrcNodePort:result"];
-}

+ 0 - 2
tests/StreamFMA_MAX5C_DFE_SIM/scratch/StreamFMAKernel_FIFOReport.dot

@@ -1,2 +0,0 @@
-digraph fifoReportGraph {
-}

+ 0 - 0
tests/StreamFMA_MAX5C_DFE_SIM/scratch/StreamFMAKernel_FIFOReport.txt


+ 0 - 2
tests/StreamFMA_MAX5C_DFE_SIM/scratch/StreamFMAKernel_FIFOReportSimple.dot

@@ -1,2 +0,0 @@
-digraph fifoReportGraph {
-}

+ 0 - 8
tests/StreamFMA_MAX5C_DFE_SIM/scratch/StreamFMAKernel_FIFOReportTopHitters.txt

@@ -1,8 +0,0 @@
-Top 10 largest FIFOs
-     Costs                                              From                                                To
-
-Top 10 lines with FIFO sinks
-     Costs                                              LineFIFO Count
-
-Top 10 lines with FIFO sources
-     Costs                                              LineFIFO Count

+ 0 - 2
tests/StreamFMA_MAX5C_DFE_SIM/scratch/StreamFMAKernel_IODistances.h

@@ -1,2 +0,0 @@
-X(IO_DISTANCE_A_OUTPUT, 6)
-X(IO_DISTANCE_B_OUTPUT, 6)

+ 0 - 256
tests/StreamFMA_MAX5C_DFE_SIM/scratch/StreamFMAKernel_NodeDiary.txt

@@ -1,256 +0,0 @@
-NodeID     : 0
-Node       : Scalar input (io_a_force_disabled)
-Node type  : NodeInputMappedReg
-Creator    : User
-Stack Trace:
-com.maxeler.maxcompiler.v2.kernelcompiler.stdlib.core.IO.input(IO.java:630)
-perfmodels.StreamFMAKernel.<init>(StreamFMAKernel.maxj:15)
-perfmodels.StreamFMAManager.<init>(StreamFMAManager.maxj:13)
-perfmodels.StreamFMAManager.main(StreamFMAManager.maxj:20)
-------------
-NodeID     : 1
-Node       : ~
-Node type  : NodeNot
-Creator    : User
-Stack Trace:
-com.maxeler.maxcompiler.v2.kernelcompiler.stdlib.core.IO.input(IO.java:630)
-perfmodels.StreamFMAKernel.<init>(StreamFMAKernel.maxj:15)
-perfmodels.StreamFMAManager.<init>(StreamFMAManager.maxj:13)
-perfmodels.StreamFMAManager.main(StreamFMAManager.maxj:20)
-------------
-NodeID     : 2
-Node       : Input(a)
-Node type  : NodeInput
-Creator    : User
-Stack Trace:
-com.maxeler.maxcompiler.v2.kernelcompiler.stdlib.core.IO.input(IO.java:630)
-perfmodels.StreamFMAKernel.<init>(StreamFMAKernel.maxj:15)
-perfmodels.StreamFMAManager.<init>(StreamFMAManager.maxj:13)
-perfmodels.StreamFMAManager.main(StreamFMAManager.maxj:20)
-------------
-NodeID     : 3
-Node       : Scalar input (io_b_force_disabled)
-Node type  : NodeInputMappedReg
-Creator    : User
-Stack Trace:
-com.maxeler.maxcompiler.v2.kernelcompiler.stdlib.core.IO.input(IO.java:630)
-perfmodels.StreamFMAKernel.<init>(StreamFMAKernel.maxj:16)
-perfmodels.StreamFMAManager.<init>(StreamFMAManager.maxj:13)
-perfmodels.StreamFMAManager.main(StreamFMAManager.maxj:20)
-------------
-NodeID     : 4
-Node       : ~
-Node type  : NodeNot
-Creator    : User
-Stack Trace:
-com.maxeler.maxcompiler.v2.kernelcompiler.stdlib.core.IO.input(IO.java:630)
-perfmodels.StreamFMAKernel.<init>(StreamFMAKernel.maxj:16)
-perfmodels.StreamFMAManager.<init>(StreamFMAManager.maxj:13)
-perfmodels.StreamFMAManager.main(StreamFMAManager.maxj:20)
-------------
-NodeID     : 5
-Node       : Input(b)
-Node type  : NodeInput
-Creator    : User
-Stack Trace:
-com.maxeler.maxcompiler.v2.kernelcompiler.stdlib.core.IO.input(IO.java:630)
-perfmodels.StreamFMAKernel.<init>(StreamFMAKernel.maxj:16)
-perfmodels.StreamFMAManager.<init>(StreamFMAManager.maxj:13)
-perfmodels.StreamFMAManager.main(StreamFMAManager.maxj:20)
-------------
-NodeID     : 6
-Node       : +
-Node type  : NodeAdd
-Creator    : User
-Stack Trace:
-com.maxeler.maxcompiler.v2.kernelcompiler.types.base.DFEVar.add(DFEVar.java:1010)
-perfmodels.StreamFMAKernel.<init>(StreamFMAKernel.maxj:19)
-perfmodels.StreamFMAManager.<init>(StreamFMAManager.maxj:13)
-perfmodels.StreamFMAManager.main(StreamFMAManager.maxj:20)
-------------
-NODE WAS REMOVED!
-NodeID     : 7
-Node       : {HWOffsetFix:1, 0, UNSIGNED}\n0x1; 1.0
-Node type  : NodeConstantRawBits
-Removed by : [OptimiseNodesPass]
-Creator    : User
-Stack Trace:
-com.maxeler.maxcompiler.v2.kernelcompiler.stdlib.core.IO.output(IO.java:836)
-perfmodels.StreamFMAKernel.<init>(StreamFMAKernel.maxj:21)
-perfmodels.StreamFMAManager.<init>(StreamFMAManager.maxj:13)
-perfmodels.StreamFMAManager.main(StreamFMAManager.maxj:20)
-------------
-NodeID     : 8
-Node       : Scalar input (io_output_force_disabled)
-Node type  : NodeInputMappedReg
-Creator    : User
-Stack Trace:
-com.maxeler.maxcompiler.v2.kernelcompiler.stdlib.core.IO.output(IO.java:836)
-perfmodels.StreamFMAKernel.<init>(StreamFMAKernel.maxj:21)
-perfmodels.StreamFMAManager.<init>(StreamFMAManager.maxj:13)
-perfmodels.StreamFMAManager.main(StreamFMAManager.maxj:20)
-------------
-NodeID     : 9
-Node       : ~
-Node type  : NodeNot
-Creator    : User
-Stack Trace:
-com.maxeler.maxcompiler.v2.kernelcompiler.stdlib.core.IO.output(IO.java:836)
-perfmodels.StreamFMAKernel.<init>(StreamFMAKernel.maxj:21)
-perfmodels.StreamFMAManager.<init>(StreamFMAManager.maxj:13)
-perfmodels.StreamFMAManager.main(StreamFMAManager.maxj:20)
-------------
-NODE WAS REMOVED!
-NodeID     : 10
-Node       : &
-Node type  : NodeAnd
-Removed by : [OptimiseNodesPass]
-Creator    : User
-Stack Trace:
-com.maxeler.maxcompiler.v2.kernelcompiler.stdlib.core.IO.output(IO.java:836)
-perfmodels.StreamFMAKernel.<init>(StreamFMAKernel.maxj:21)
-perfmodels.StreamFMAManager.<init>(StreamFMAManager.maxj:13)
-perfmodels.StreamFMAManager.main(StreamFMAManager.maxj:20)
-------------
-NodeID     : 11
-Node       : Output(output)
-Node type  : NodeOutput
-Creator    : User
-Stack Trace:
-com.maxeler.maxcompiler.v2.kernelcompiler.stdlib.core.IO.output(IO.java:836)
-perfmodels.StreamFMAKernel.<init>(StreamFMAKernel.maxj:21)
-perfmodels.StreamFMAManager.<init>(StreamFMAManager.maxj:13)
-perfmodels.StreamFMAManager.main(StreamFMAManager.maxj:20)
-------------
-NODE WAS REMOVED!
-NodeID     : 12
-Node       : 1.0
-Node type  : NodeConstantDouble
-Removed by : [RemoveUntypedConstants]
-Creator    : User
-Stack Trace:
-com.maxeler.platform.max5.manager.Max5ManagerBase.addKernel(Unknown Source)
-perfmodels.StreamFMAManager.<init>(StreamFMAManager.maxj:13)
-perfmodels.StreamFMAManager.main(StreamFMAManager.maxj:20)
-Led to:
-  NodeID     : 26
-  Node       : {HWOffsetFix:1, 0, UNSIGNED}\n0x1; 1.0
-  Node type  : NodeConstantRawBits
-  Creator    : RemoveUntypedConstants
-
-------------
-NodeID     : 13
-Node       : {HWOffsetFix:49, 0, UNSIGNED}\n0x1000000000000; 2.81474976710656E14
-Node type  : NodeConstantRawBits
-Creator    : User
-Stack Trace:
-com.maxeler.platform.max5.manager.Max5ManagerBase.addKernel(Unknown Source)
-perfmodels.StreamFMAManager.<init>(StreamFMAManager.maxj:13)
-perfmodels.StreamFMAManager.main(StreamFMAManager.maxj:20)
-------------
-NodeID     : 14
-Node       : Counter(NUMERIC_INCREMENTING)\nInc: 1\nReset: 0\nInit: 0
-Node type  : NodeCounter
-Creator    : User
-Stack Trace:
-com.maxeler.platform.max5.manager.Max5ManagerBase.addKernel(Unknown Source)
-perfmodels.StreamFMAManager.<init>(StreamFMAManager.maxj:13)
-perfmodels.StreamFMAManager.main(StreamFMAManager.maxj:20)
-------------
-NodeID     : 15
-Node       : stream offset: 1
-Node type  : NodeStreamOffset
-Creator    : User
-Stack Trace:
-com.maxeler.platform.max5.manager.Max5ManagerBase.addKernel(Unknown Source)
-perfmodels.StreamFMAManager.<init>(StreamFMAManager.maxj:13)
-perfmodels.StreamFMAManager.main(StreamFMAManager.maxj:20)
-------------
-NodeID     : 16
-Node       : {HWOffsetFix:1, 0, UNSIGNED}\n0x1; 1.0
-Node type  : NodeConstantRawBits
-Creator    : User
-Stack Trace:
-com.maxeler.platform.max5.manager.Max5ManagerBase.addKernel(Unknown Source)
-perfmodels.StreamFMAManager.<init>(StreamFMAManager.maxj:13)
-perfmodels.StreamFMAManager.main(StreamFMAManager.maxj:20)
-------------
-NodeID     : 17
-Node       : Scalar output (current_run_cycle_count)
-Node type  : NodeOutputMappedReg
-Creator    : User
-Stack Trace:
-com.maxeler.platform.max5.manager.Max5ManagerBase.addKernel(Unknown Source)
-perfmodels.StreamFMAManager.<init>(StreamFMAManager.maxj:13)
-perfmodels.StreamFMAManager.main(StreamFMAManager.maxj:20)
-------------
-NODE WAS REMOVED!
-NodeID     : 18
-Node       : 1.0
-Node type  : NodeConstantDouble
-Removed by : [RemoveUntypedConstants]
-Creator    : User
-Stack Trace:
-com.maxeler.platform.max5.manager.Max5ManagerBase.addKernel(Unknown Source)
-perfmodels.StreamFMAManager.<init>(StreamFMAManager.maxj:13)
-perfmodels.StreamFMAManager.main(StreamFMAManager.maxj:20)
-Led to:
-  NodeID     : 25
-  Node       : {HWOffsetFix:1, 0, UNSIGNED}\n0x1; 1.0
-  Node type  : NodeConstantRawBits
-  Creator    : RemoveUntypedConstants
-
-------------
-NodeID     : 19
-Node       : {HWOffsetFix:49, 0, UNSIGNED}\n0x1000000000000; 2.81474976710656E14
-Node type  : NodeConstantRawBits
-Creator    : User
-Stack Trace:
-com.maxeler.platform.max5.manager.Max5ManagerBase.addKernel(Unknown Source)
-perfmodels.StreamFMAManager.<init>(StreamFMAManager.maxj:13)
-perfmodels.StreamFMAManager.main(StreamFMAManager.maxj:20)
-------------
-NodeID     : 20
-Node       : Counter(NUMERIC_INCREMENTING)\nInc: 1\nReset: 0\nInit: 0
-Node type  : NodeCounter
-Creator    : User
-Stack Trace:
-com.maxeler.platform.max5.manager.Max5ManagerBase.addKernel(Unknown Source)
-perfmodels.StreamFMAManager.<init>(StreamFMAManager.maxj:13)
-perfmodels.StreamFMAManager.main(StreamFMAManager.maxj:20)
-------------
-NodeID     : 21
-Node       : flush on trigger
-Node type  : NodeFlush
-Creator    : User
-Stack Trace:
-com.maxeler.platform.max5.manager.Max5ManagerBase.addKernel(Unknown Source)
-perfmodels.StreamFMAManager.<init>(StreamFMAManager.maxj:13)
-perfmodels.StreamFMAManager.main(StreamFMAManager.maxj:20)
-------------
-NodeID     : 22
-Node       : Scalar input (run_cycle_count)
-Node type  : NodeInputMappedReg
-Creator    : User
-Stack Trace:
-com.maxeler.platform.max5.manager.Max5ManagerBase.addKernel(Unknown Source)
-perfmodels.StreamFMAManager.<init>(StreamFMAManager.maxj:13)
-perfmodels.StreamFMAManager.main(StreamFMAManager.maxj:20)
-------------
-NODE WAS REMOVED!
-NodeID     : 23
-Node       : ==
-Node type  : NodeEq
-Removed by : [OptimiseNodesPass]
-Creator    : User
-Stack Trace:
-com.maxeler.platform.max5.manager.Max5ManagerBase.addKernel(Unknown Source)
-perfmodels.StreamFMAManager.<init>(StreamFMAManager.maxj:13)
-perfmodels.StreamFMAManager.main(StreamFMAManager.maxj:20)
-Led to:
-  NodeID     : 24
-  Node       : ==
-  Node type  : NodeEqInlined
-  Creator    : OptimiseNodesPass
-
-------------

+ 0 - 23
tests/StreamFMA_MAX5C_DFE_SIM/scratch/StreamFMAKernel_NodeStallScopeLog.txt

@@ -1,23 +0,0 @@
-              NodeID Stall origin Node ID
-                   8                 none
-                   9                 none
-                   0                 none
-                   1                 none
-                   2                 none
-                   3                 none
-                   4                 none
-                   5                 none
-                   6                 none
-                  11                 none
-                  16                 none
-                  26                 none
-                  13                 none
-                  14                 none
-                  15                 none
-                  17                 none
-                  25                 none
-                  19                 none
-                  20                 none
-                  22                 none
-                  24                 none
-                  21                 none

+ 0 - 0
tests/StreamFMA_MAX5C_DFE_SIM/scratch/StreamFMAKernel_StreamOffsetEqs.h


+ 0 - 9
tests/StreamFMA_MAX5C_DFE_SIM/scratch/StreamFMAKernel_final.dot

@@ -1,9 +0,0 @@
-digraph StreamFMAKernel_final{
-	NodeInput2 [shape=invhouse, label="a\nID: 2"];
-	NodeInput5 [shape=invhouse, label="b\nID: 5"];
-	NodeAdd6 [label="+\nID: 6"];
-	NodeOutput11 [shape=house, label="output\nID: 11"];
-	NodeInput2 -> NodeAdd6[color="/dark28/1" photon_data="EDGE,SrcNode:2,SrcNodePort:data"];
-	NodeInput5 -> NodeAdd6[color="/dark28/2" photon_data="EDGE,SrcNode:5,SrcNodePort:data"];
-	NodeAdd6 -> NodeOutput11[color="/dark28/3" photon_data="EDGE,SrcNode:6,SrcNodePort:result"];
-}

+ 0 - 25
tests/StreamFMA_MAX5C_DFE_SIM/scratch/StreamFMAKernel_final_graphDump.dat

@@ -1,25 +0,0 @@
-Node: 8
-Node: 9
-Node: 0
-Node: 1
-Node: 2
-Node: 3
-Node: 4
-Node: 5
-Node: 6
-Node: 11
-Node: 16
-Node: 26
-Node: 13
-Node: 14
-Node: 15
-Node: 17
-Node: 25
-Node: 19
-Node: 20
-Node: 22
-Node: 24
-Node: 21
-Edge: 2 -> 6
-Edge: 5 -> 6
-Edge: 6 -> 11

+ 0 - 10
tests/StreamFMA_MAX5C_DFE_SIM/scratch/StreamFMAKernel_nodeschedule_firstfifos.csv

@@ -1,10 +0,0 @@
-2,NodeInput,0
-5,NodeInput,0
-6,NodeAdd,0
-11,NodeOutput,0
-14,NodeCounter,0
-15,NodeStreamOffset,0
-17,NodeOutputMappedReg,0
-20,NodeCounter,0
-24,NodeEqInlined,0
-21,NodeFlush,0

+ 0 - 10
tests/StreamFMA_MAX5C_DFE_SIM/scratch/StreamFMAKernel_nodeschedule_firstpass.csv

@@ -1,10 +0,0 @@
-2,NodeInput,0
-5,NodeInput,0
-6,NodeAdd,0
-11,NodeOutput,0
-14,NodeCounter,0
-15,NodeStreamOffset,0
-17,NodeOutputMappedReg,0
-20,NodeCounter,0
-24,NodeEqInlined,0
-21,NodeFlush,0

+ 0 - 10
tests/StreamFMA_MAX5C_DFE_SIM/scratch/StreamFMAKernel_nodeschedule_secondpass.csv

@@ -1,10 +0,0 @@
-2,NodeInput,4
-5,NodeInput,4
-6,NodeAdd,9
-11,NodeOutput,10
-14,NodeCounter,3
-15,NodeStreamOffset,3
-17,NodeOutputMappedReg,4
-20,NodeCounter,0
-24,NodeEqInlined,0
-21,NodeFlush,1

+ 0 - 9
tests/StreamFMA_MAX5C_DFE_SIM/scratch/StreamFMAKernel_optimised.dot

@@ -1,9 +0,0 @@
-digraph StreamFMAKernel_optimised{
-	NodeInput2 [shape=invhouse, label="a\nID: 2"];
-	NodeInput5 [shape=invhouse, label="b\nID: 5"];
-	NodeAdd6 [label="+\nID: 6"];
-	NodeOutput11 [shape=house, label="output\nID: 11"];
-	NodeInput2 -> NodeAdd6[color="/dark28/1" photon_data="EDGE,SrcNode:2,SrcNodePort:data"];
-	NodeInput5 -> NodeAdd6[color="/dark28/2" photon_data="EDGE,SrcNode:5,SrcNodePort:data"];
-	NodeAdd6 -> NodeOutput11[color="/dark28/3" photon_data="EDGE,SrcNode:6,SrcNodePort:result"];
-}

+ 0 - 9
tests/StreamFMA_MAX5C_DFE_SIM/scratch/StreamFMAKernel_original.dot

@@ -1,9 +0,0 @@
-digraph StreamFMAKernel_original{
-	NodeInput2 [shape=invhouse, label="a\nID: 2"];
-	NodeInput5 [shape=invhouse, label="b\nID: 5"];
-	NodeAdd6 [label="+\nID: 6"];
-	NodeOutput11 [shape=house, label="output\nID: 11"];
-	NodeInput2 -> NodeAdd6[color="/dark28/1" photon_data="EDGE,SrcNode:2,SrcNodePort:data"];
-	NodeInput5 -> NodeAdd6[color="/dark28/2" photon_data="EDGE,SrcNode:5,SrcNodePort:data"];
-	NodeAdd6 -> NodeOutput11[color="/dark28/3" photon_data="EDGE,SrcNode:6,SrcNodePort:result"];
-}

+ 0 - 35
tests/StreamFMA_MAX5C_DFE_SIM/scratch/StreamFMAKernel_photon_stats.csv

@@ -1,35 +0,0 @@
-
-Pre-schedule statistics
-
-
-Total nodes: 19
-
-Node class;Type;Length;Num
-NodeAdd;{HWOffsetFix:32, 0, TWOSCOMPLEMENT};0;1
-NodeConstantDouble;HWUntypedConst;0;2
-NodeConstantRawBits;{HWOffsetFix:1, 0, UNSIGNED};0;1
-NodeConstantRawBits;{HWOffsetFix:49, 0, UNSIGNED};0;2
-NodeCounter;{HWOffsetFix:48, 0, UNSIGNED};0;2
-NodeEqInlined;{HWOffsetFix:1, 0, UNSIGNED};0;1
-NodeInput;{HWOffsetFix:32, 0, TWOSCOMPLEMENT};0;2
-NodeInputMappedReg;{HWOffsetFix:1, 0, UNSIGNED};0;3
-NodeInputMappedReg;{HWOffsetFix:48, 0, UNSIGNED};0;1
-NodeNot;{HWOffsetFix:1, 0, UNSIGNED};0;3
-NodeStreamOffset;{HWOffsetFix:48, 0, UNSIGNED};0;1
-
-Final statistics
-
-
-Total nodes: 19
-
-Node class;Type;Length;Num
-NodeAdd;{HWOffsetFix:32, 0, TWOSCOMPLEMENT};0;1
-NodeConstantRawBits;{HWOffsetFix:1, 0, UNSIGNED};0;3
-NodeConstantRawBits;{HWOffsetFix:49, 0, UNSIGNED};0;2
-NodeCounter;{HWOffsetFix:48, 0, UNSIGNED};0;2
-NodeEqInlined;{HWOffsetFix:1, 0, UNSIGNED};0;1
-NodeInput;{HWOffsetFix:32, 0, TWOSCOMPLEMENT};0;2
-NodeInputMappedReg;{HWOffsetFix:1, 0, UNSIGNED};0;3
-NodeInputMappedReg;{HWOffsetFix:48, 0, UNSIGNED};0;1
-NodeNot;{HWOffsetFix:1, 0, UNSIGNED};0;3
-NodeStreamOffset;{HWOffsetFix:48, 0, UNSIGNED};0;1

+ 0 - 9
tests/StreamFMA_MAX5C_DFE_SIM/scratch/StreamFMAKernel_post_dsp_extraction.dot

@@ -1,9 +0,0 @@
-digraph StreamFMAKernel_post_dsp_extraction{
-	NodeInput2 [shape=invhouse, label="a\nID: 2"];
-	NodeInput5 [shape=invhouse, label="b\nID: 5"];
-	NodeAdd6 [label="+\nID: 6"];
-	NodeOutput11 [shape=house, label="output\nID: 11"];
-	NodeInput2 -> NodeAdd6[color="/dark28/1" photon_data="EDGE,SrcNode:2,SrcNodePort:data"];
-	NodeInput5 -> NodeAdd6[color="/dark28/2" photon_data="EDGE,SrcNode:5,SrcNodePort:data"];
-	NodeAdd6 -> NodeOutput11[color="/dark28/3" photon_data="EDGE,SrcNode:6,SrcNodePort:result"];
-}

+ 0 - 9
tests/StreamFMA_MAX5C_DFE_SIM/scratch/StreamFMAKernel_post_tri_add_extraction.dot

@@ -1,9 +0,0 @@
-digraph StreamFMAKernel_post_tri_add_extraction{
-	NodeInput2 [shape=invhouse, label="a\nID: 2"];
-	NodeInput5 [shape=invhouse, label="b\nID: 5"];
-	NodeAdd6 [label="+\nID: 6"];
-	NodeOutput11 [shape=house, label="output\nID: 11"];
-	NodeInput2 -> NodeAdd6[color="/dark28/1" photon_data="EDGE,SrcNode:2,SrcNodePort:data"];
-	NodeInput5 -> NodeAdd6[color="/dark28/2" photon_data="EDGE,SrcNode:5,SrcNodePort:data"];
-	NodeAdd6 -> NodeOutput11[color="/dark28/3" photon_data="EDGE,SrcNode:6,SrcNodePort:result"];
-}

+ 0 - 9
tests/StreamFMA_MAX5C_DFE_SIM/scratch/StreamFMAKernel_pre_condadd_extraction.dot

@@ -1,9 +0,0 @@
-digraph StreamFMAKernel_pre_condadd_extraction{
-	NodeInput2 [shape=invhouse, label="a\nID: 2"];
-	NodeInput5 [shape=invhouse, label="b\nID: 5"];
-	NodeAdd6 [label="+\nID: 6"];
-	NodeOutput11 [shape=house, label="output\nID: 11"];
-	NodeInput2 -> NodeAdd6[color="/dark28/1" photon_data="EDGE,SrcNode:2,SrcNodePort:data"];
-	NodeInput5 -> NodeAdd6[color="/dark28/2" photon_data="EDGE,SrcNode:5,SrcNodePort:data"];
-	NodeAdd6 -> NodeOutput11[color="/dark28/3" photon_data="EDGE,SrcNode:6,SrcNodePort:result"];
-}

+ 0 - 9
tests/StreamFMA_MAX5C_DFE_SIM/scratch/StreamFMAKernel_pre_dsp_extraction.dot

@@ -1,9 +0,0 @@
-digraph StreamFMAKernel_pre_dsp_extraction{
-	NodeInput2 [shape=invhouse, label="a\nID: 2"];
-	NodeInput5 [shape=invhouse, label="b\nID: 5"];
-	NodeAdd6 [label="+\nID: 6"];
-	NodeOutput11 [shape=house, label="output\nID: 11"];
-	NodeInput2 -> NodeAdd6[color="/dark28/1" photon_data="EDGE,SrcNode:2,SrcNodePort:data"];
-	NodeInput5 -> NodeAdd6[color="/dark28/2" photon_data="EDGE,SrcNode:5,SrcNodePort:data"];
-	NodeAdd6 -> NodeOutput11[color="/dark28/3" photon_data="EDGE,SrcNode:6,SrcNodePort:result"];
-}

+ 0 - 20
tests/StreamFMA_MAX5C_DFE_SIM/scratch/StreamFMAKernel_schedule_C.csv

@@ -1,20 +0,0 @@
-name,solution
-C0000001,0
-C0000002,0
-C0000003,0
-C0000004,0
-C0000005,0
-C0000006,0
-C0000007,0
-C0000008,0
-C0000009,0
-C0000010,9
-C0000011,4
-C0000012,4
-C0000013,10
-C0000014,3
-C0000015,3
-C0000016,4
-C0000017,0
-C0000018,0
-C0000019,1

BIN
tests/StreamFMA_MAX5C_DFE_SIM/scratch/StreamFMAKernel_schedule_C.mps.gz


+ 0 - 55
tests/StreamFMA_MAX5C_DFE_SIM/scratch/StreamFMAKernel_schedule_C.stdout.log

@@ -1,55 +0,0 @@
-Welcome to the CBC MILP Solver 
-Version: 2.9.8 
-Build Date: Apr 18 2016 
-
-command line - /opt/Software/maxeler/maxcompiler-2018.3.1/bin/cbc StreamFMAKernel_schedule_C.mps.gz -threads 12 -solve -printi csv -solu StreamFMAKernel_schedule_C.csv (default strategy 1)
-At line 1 NAME           CxSchedule
-At line 2 ROWS
-At line 22 COLUMNS
-At line 54 RHS
-At line 65 BOUNDS
-At line 85 ENDATA
-Problem CxSchedule has 18 rows, 19 columns and 43 elements
-Coin0008I CxSchedule read with 0 errors
-threads was changed from 0 to 12
-Continuous objective value is 0 - 0.00 seconds
-Cgl0003I 0 fixed, 19 tightened bounds, 0 strengthened rows, 0 substitutions
-Cgl0003I 0 fixed, 1 tightened bounds, 0 strengthened rows, 0 substitutions
-Cgl0004I processed model has 18 rows, 17 columns (17 integer (0 of which binary)) and 43 elements
-Cutoff increment increased from 1e-05 to 0.9999
-Cbc0012I Integer solution of 0 found by DiveCoefficient after 0 iterations and 0 nodes (0.00 seconds)
-Cbc0030I Thread 0 used 0 times,  waiting to start 0.0042200089, 0 cpu time, 0 locks, 0 locked, 0 waiting for locks
-Cbc0030I Thread 1 used 0 times,  waiting to start 0.005792141, 0 cpu time, 0 locks, 0 locked, 0 waiting for locks
-Cbc0030I Thread 2 used 0 times,  waiting to start 0.0055027008, 0 cpu time, 0 locks, 0 locked, 0 waiting for locks
-Cbc0030I Thread 3 used 0 times,  waiting to start 0.0051693916, 0 cpu time, 0 locks, 0 locked, 0 waiting for locks
-Cbc0030I Thread 4 used 0 times,  waiting to start 0.0048518181, 0 cpu time, 0 locks, 0 locked, 0 waiting for locks
-Cbc0030I Thread 5 used 0 times,  waiting to start 0.0046050549, 0 cpu time, 0 locks, 0 locked, 0 waiting for locks
-Cbc0030I Thread 6 used 0 times,  waiting to start 0.0043241978, 0 cpu time, 0 locks, 0 locked, 0 waiting for locks
-Cbc0030I Thread 7 used 0 times,  waiting to start 0.0040543079, 0 cpu time, 0 locks, 0 locked, 0 waiting for locks
-Cbc0030I Thread 8 used 0 times,  waiting to start 0.0037629604, 0 cpu time, 0 locks, 0 locked, 0 waiting for locks
-Cbc0030I Thread 9 used 0 times,  waiting to start 0.0034866333, 0 cpu time, 0 locks, 0 locked, 0 waiting for locks
-Cbc0030I Thread 10 used 0 times,  waiting to start 0.0032193661, 0 cpu time, 0 locks, 0 locked, 0 waiting for locks
-Cbc0030I Thread 11 used 0 times,  waiting to start 0.0029232502, 0 cpu time, 0 locks, 0 locked, 0 waiting for locks
-Cbc0030I Main thread 0 waiting for threads,  1 locks, 4.529953e-06 locked, 4.7683716e-07 waiting for locks
-Cbc0001I Search completed - best objective 0, took 0 iterations and 0 nodes (0.01 seconds)
-Cbc0035I Maximum depth 0, 0 variables fixed on reduced cost
-Cuts at root node changed objective from 0 to 0
-Probing was tried 0 times and created 0 cuts of which 0 were active after adding rounds of cuts (0.000 seconds)
-Gomory was tried 0 times and created 0 cuts of which 0 were active after adding rounds of cuts (0.000 seconds)
-Knapsack was tried 0 times and created 0 cuts of which 0 were active after adding rounds of cuts (0.000 seconds)
-Clique was tried 0 times and created 0 cuts of which 0 were active after adding rounds of cuts (0.000 seconds)
-MixedIntegerRounding2 was tried 0 times and created 0 cuts of which 0 were active after adding rounds of cuts (0.000 seconds)
-FlowCover was tried 0 times and created 0 cuts of which 0 were active after adding rounds of cuts (0.000 seconds)
-TwoMirCuts was tried 0 times and created 0 cuts of which 0 were active after adding rounds of cuts (0.000 seconds)
-
-Result - Optimal solution found
-
-Objective value:                0.00000000
-Enumerated nodes:               0
-Total iterations:               0
-Time (CPU seconds):             0.01
-Time (Wallclock seconds):       0.02
-
-Option for printingOptions changed from normal to csv
-Total time (CPU seconds):       0.01   (Wallclock seconds):       0.03
-

+ 0 - 9
tests/StreamFMA_MAX5C_DFE_SIM/scratch/StreamFMAKernel_tapnfold_1.dot

@@ -1,9 +0,0 @@
-digraph StreamFMAKernel_tapnfold_1{
-	NodeInput2 [shape=invhouse, label="a\nID: 2"];
-	NodeInput5 [shape=invhouse, label="b\nID: 5"];
-	NodeAdd6 [label="+\nID: 6"];
-	NodeOutput11 [shape=house, label="output\nID: 11"];
-	NodeInput2 -> NodeAdd6[color="/dark28/1" photon_data="EDGE,SrcNode:2,SrcNodePort:data"];
-	NodeInput5 -> NodeAdd6[color="/dark28/2" photon_data="EDGE,SrcNode:5,SrcNodePort:data"];
-	NodeAdd6 -> NodeOutput11[color="/dark28/3" photon_data="EDGE,SrcNode:6,SrcNodePort:result"];
-}

+ 0 - 9
tests/StreamFMA_MAX5C_DFE_SIM/scratch/StreamFMAKernel_tapnfold_2.dot

@@ -1,9 +0,0 @@
-digraph StreamFMAKernel_tapnfold_2{
-	NodeInput2 [shape=invhouse, label="a\nID: 2"];
-	NodeInput5 [shape=invhouse, label="b\nID: 5"];
-	NodeAdd6 [label="+\nID: 6"];
-	NodeOutput11 [shape=house, label="output\nID: 11"];
-	NodeInput2 -> NodeAdd6[color="/dark28/1" photon_data="EDGE,SrcNode:2,SrcNodePort:data"];
-	NodeInput5 -> NodeAdd6[color="/dark28/2" photon_data="EDGE,SrcNode:5,SrcNodePort:data"];
-	NodeAdd6 -> NodeOutput11[color="/dark28/3" photon_data="EDGE,SrcNode:6,SrcNodePort:result"];
-}

+ 0 - 9
tests/StreamFMA_MAX5C_DFE_SIM/scratch/StreamFMAKernel_validated_fifos.dot

@@ -1,9 +0,0 @@
-digraph StreamFMAKernel_validated_fifos{
-	NodeInput2 [shape=invhouse, label="a\nID: 2"];
-	NodeInput5 [shape=invhouse, label="b\nID: 5"];
-	NodeAdd6 [label="+\nID: 6"];
-	NodeOutput11 [shape=house, label="output\nID: 11"];
-	NodeInput2 -> NodeAdd6[color="/dark28/1" photon_data="EDGE,SrcNode:2,SrcNodePort:data"];
-	NodeInput5 -> NodeAdd6[color="/dark28/2" photon_data="EDGE,SrcNode:5,SrcNodePort:data"];
-	NodeAdd6 -> NodeOutput11[color="/dark28/3" photon_data="EDGE,SrcNode:6,SrcNodePort:result"];
-}

+ 0 - 49
tests/StreamFMA_MAX5C_DFE_SIM/scratch/StreamWrapperRegs.info

@@ -1,49 +0,0 @@
-STREAMFMAKERNEL version:0,000,instance:0
-	IO_A_FORCE_DISABLED base:0x0,width:1,bytemask:0x1
-		BITS width:1,mask:0x1
-	IO_B_FORCE_DISABLED base:0x1,width:1,bytemask:0x1
-		BITS width:1,mask:0x1
-	IO_OUTPUT_FORCE_DISABLED base:0x2,width:1,bytemask:0x1
-		BITS width:1,mask:0x1
-	RUN_CYCLE_COUNT base:0x3,width:48,bytemask:0x3f
-		BITS width:48,mask:0xffffffff
-	CURRENT_RUN_CYCLE_COUNT base:0x9,width:48,bytemask:0x3f
-		BITS width:48,mask:0xffffffff
-	DBG_CTLD_ALMOST_EMPTY base:0xf,width:2,bytemask:0x1
-		BITS width:2,mask:0x3
-	DBG_CTLD_DONE base:0x10,width:2,bytemask:0x1
-		BITS width:2,mask:0x3
-	DBG_CTLD_EMPTY base:0x11,width:2,bytemask:0x1
-		BITS width:2,mask:0x3
-	DBG_CTLD_READ base:0x12,width:2,bytemask:0x1
-		BITS width:2,mask:0x3
-	DBG_CTLD_READ_PIPE_DBG base:0x13,width:6,bytemask:0x1
-		BITS width:6,mask:0x3f
-	DBG_CTLD_REQUEST base:0x14,width:2,bytemask:0x1
-		BITS width:2,mask:0x3
-	DBG_DONE_OUT base:0x15,width:1,bytemask:0x1
-		BITS width:1,mask:0x1
-	DBG_FILL_LEVEL base:0x16,width:4,bytemask:0x1
-		BITS width:4,mask:0xf
-	DBG_FLUSH_LEVEL base:0x17,width:4,bytemask:0x1
-		BITS width:4,mask:0xf
-	DBG_FLUSH_START base:0x18,width:1,bytemask:0x1
-		BITS width:1,mask:0x1
-	DBG_FLUSH_START_LEVEL base:0x19,width:4,bytemask:0x1
-		BITS width:4,mask:0xf
-	DBG_FLUSHING base:0x1a,width:1,bytemask:0x1
-		BITS width:1,mask:0x1
-	DBG_FULL_LEVEL base:0x1b,width:4,bytemask:0x1
-		BITS width:4,mask:0xf
-	DBG_OUT_STALL base:0x1c,width:1,bytemask:0x1
-		BITS width:1,mask:0x1
-	DBG_OUT_VALID base:0x1d,width:1,bytemask:0x1
-		BITS width:1,mask:0x1
-	DBG_STALL_VECTOR base:0x1e,width:1,bytemask:0x1
-		BITS width:1,mask:0x1
-IFPGA version:1,000,instance:0
-	IFPGA_CTRL base:0x1f,width:8,bytemask:0x1
-		BITS width:8,mask:0xff
-SIGNALFORWARDINGADAPTER version:1,000,instance:0
-	SFA_FORWARD_EN base:0x20,width:32,bytemask:0xf
-		BITS width:32,mask:0xffffffff

File diff suppressed because it is too large
+ 0 - 1
tests/StreamFMA_MAX5C_DFE_SIM/scratch/allEngParams.json


+ 0 - 20
tests/StreamFMA_MAX5C_DFE_SIM/scratch/manager_clock_report.txt

@@ -1,20 +0,0 @@
-Clock: PCIE (frequency 125.0 MHz phase 0.0 duty cycle 0.5 static)
-	[PCIE] b (PCIe_From_Host)
-	[PCIE] a (PCIe_From_Host)
-	[PCIE] Stream_15 (Fifo)
-	[PCIE] Stream_15 (Fifo)
-	[PCIE] Stream_11 (Fifo)
-	[PCIE] Stream_11 (Fifo)
-	[PCIE] Stream_1 (DualAspectMux)
-	[PCIE] Stream_4 (DualAspectMux)
-	[PCIE] Stream_17 (Fifo)
-	[PCIE] Stream_13 (Fifo)
-	[PCIE] Stream_19 (Fifo)
-	[PCIE] Stream_8 (DualAspectReg)
-	[PCIE] Stream_21 (StreamPullPushAdapter)
-	[PCIE] output (PCIe_To_Host)
-Clock: STREAM (frequency 100.0 MHz phase 0.0 duty cycle 0.5 static)
-	[STREAM] Stream_17 (Fifo)
-	[STREAM] Stream_13 (Fifo)
-	[STREAM] StreamFMAKernel (Kernel)
-	[STREAM] Stream_19 (Fifo)

+ 0 - 9
tests/StreamFMA_MAX5C_DFE_SIM/scratch/software-sim/build/Makefile.local_rules

@@ -1,9 +0,0 @@
-CXXFLAGS_OPTIONAL := -DHAVE_KERNELS -DMAXFILE_INC="../../MaxCompilerDesignData.dat" -g0  -DSLIC_NO_DECLARATIONS 
-CFLAGS_OPTIONAL   := -DMAXFILE_INC="../../MaxCompilerDesignData.dat" -g0  -DSLIC_NO_DECLARATIONS 
-LDFLAGS_OPTIONAL  := -O2 -s
-TARGET_BIN := StreamFMA.so
-MODE := SHARED_OBJECT
-OBJS :=  \
-	$(OBJDIR)/StreamFMAKernel_exec0.O2.o \
-	$(OBJDIR)/StreamFMAKernel.O0.o \
-	$(OBJDIR)/StreamFMAKernel_Templates.O2.o

+ 0 - 9
tests/StreamFMA_MAX5C_DFE_SIM/scratch/software-sim/build/Makefile.local_rules.tmp

@@ -1,9 +0,0 @@
-CXXFLAGS_OPTIONAL := -DHAVE_KERNELS -DMAXFILE_INC="../../MaxCompilerDesignData.dat" -g0  -DSLIC_NO_DECLARATIONS 
-CFLAGS_OPTIONAL   := -DMAXFILE_INC="../../MaxCompilerDesignData.dat" -g0  -DSLIC_NO_DECLARATIONS 
-LDFLAGS_OPTIONAL  := -O2 -s
-TARGET_BIN := StreamFMA.so
-MODE := SHARED_OBJECT
-OBJS :=  \
-	$(OBJDIR)/StreamFMAKernel_exec0.O2.o \
-	$(OBJDIR)/StreamFMAKernel.O0.o \
-	$(OBJDIR)/StreamFMAKernel_Templates.O2.o

BIN
tests/StreamFMA_MAX5C_DFE_SIM/scratch/software-sim/build/StreamFMA.so


+ 0 - 138
tests/StreamFMA_MAX5C_DFE_SIM/scratch/software-sim/build/StreamFMAKernel.cpp

@@ -1,138 +0,0 @@
-#include "stdsimheader.h"
-#include "StreamFMAKernel.h"
-
-namespace maxcompilersim {
-
-StreamFMAKernel::StreamFMAKernel(const std::string &instance_name) : 
-  ManagerBlockSync(instance_name),
-  KernelManagerBlockSync(instance_name, 10, 2, 0, 0, "",1)
-, c_hw_fix_1_0_uns_bits((HWOffsetFix<1,0,UNSIGNED>(varint_u<1>(0x0l))))
-, c_hw_fix_32_0_sgn_undef((HWOffsetFix<32,0,TWOSCOMPLEMENT>()))
-, c_hw_fix_1_0_uns_bits_1((HWOffsetFix<1,0,UNSIGNED>(varint_u<1>(0x1l))))
-, c_hw_fix_49_0_uns_bits((HWOffsetFix<49,0,UNSIGNED>(varint_u<49>(0x1000000000000l))))
-, c_hw_fix_49_0_uns_bits_1((HWOffsetFix<49,0,UNSIGNED>(varint_u<49>(0x0000000000000l))))
-, c_hw_fix_49_0_uns_bits_2((HWOffsetFix<49,0,UNSIGNED>(varint_u<49>(0x0000000000001l))))
-{
-  { // Node ID: 8 (NodeInputMappedReg)
-    registerMappedRegister("io_output_force_disabled", Data(1));
-  }
-  { // Node ID: 0 (NodeInputMappedReg)
-    registerMappedRegister("io_a_force_disabled", Data(1));
-  }
-  { // Node ID: 2 (NodeInput)
-     m_a =  registerInput("a",0,5);
-  }
-  { // Node ID: 3 (NodeInputMappedReg)
-    registerMappedRegister("io_b_force_disabled", Data(1));
-  }
-  { // Node ID: 5 (NodeInput)
-     m_b =  registerInput("b",1,5);
-  }
-  { // Node ID: 11 (NodeOutput)
-    m_output = registerOutput("output",0 );
-  }
-  { // Node ID: 16 (NodeConstantRawBits)
-    id16out_value = (c_hw_fix_1_0_uns_bits_1);
-  }
-  { // Node ID: 26 (NodeConstantRawBits)
-    id26out_value = (c_hw_fix_1_0_uns_bits_1);
-  }
-  { // Node ID: 13 (NodeConstantRawBits)
-    id13out_value = (c_hw_fix_49_0_uns_bits);
-  }
-  { // Node ID: 17 (NodeOutputMappedReg)
-    registerMappedRegister("current_run_cycle_count", Data(48), true);
-  }
-  { // Node ID: 25 (NodeConstantRawBits)
-    id25out_value = (c_hw_fix_1_0_uns_bits_1);
-  }
-  { // Node ID: 19 (NodeConstantRawBits)
-    id19out_value = (c_hw_fix_49_0_uns_bits);
-  }
-  { // Node ID: 22 (NodeInputMappedReg)
-    registerMappedRegister("run_cycle_count", Data(48));
-  }
-}
-
-void StreamFMAKernel::resetComputation() {
-  resetComputationAfterFlush();
-}
-
-void StreamFMAKernel::resetComputationAfterFlush() {
-  { // Node ID: 8 (NodeInputMappedReg)
-    id8out_io_output_force_disabled = getMappedRegValue<HWOffsetFix<1,0,UNSIGNED> >("io_output_force_disabled");
-  }
-  { // Node ID: 0 (NodeInputMappedReg)
-    id0out_io_a_force_disabled = getMappedRegValue<HWOffsetFix<1,0,UNSIGNED> >("io_a_force_disabled");
-  }
-  { // Node ID: 2 (NodeInput)
-
-    (id2st_read_next_cycle) = (c_hw_fix_1_0_uns_bits);
-    (id2st_last_read_value) = (c_hw_fix_32_0_sgn_undef);
-  }
-  { // Node ID: 3 (NodeInputMappedReg)
-    id3out_io_b_force_disabled = getMappedRegValue<HWOffsetFix<1,0,UNSIGNED> >("io_b_force_disabled");
-  }
-  { // Node ID: 5 (NodeInput)
-
-    (id5st_read_next_cycle) = (c_hw_fix_1_0_uns_bits);
-    (id5st_last_read_value) = (c_hw_fix_32_0_sgn_undef);
-  }
-  { // Node ID: 14 (NodeCounter)
-
-    (id14st_count) = (c_hw_fix_49_0_uns_bits_1);
-  }
-  { // Node ID: 20 (NodeCounter)
-
-    (id20st_count) = (c_hw_fix_49_0_uns_bits_1);
-  }
-  { // Node ID: 22 (NodeInputMappedReg)
-    id22out_run_cycle_count = getMappedRegValue<HWOffsetFix<48,0,UNSIGNED> >("run_cycle_count");
-  }
-}
-
-void StreamFMAKernel::updateState() {
-  { // Node ID: 8 (NodeInputMappedReg)
-    id8out_io_output_force_disabled = getMappedRegValue<HWOffsetFix<1,0,UNSIGNED> >("io_output_force_disabled");
-  }
-  { // Node ID: 0 (NodeInputMappedReg)
-    id0out_io_a_force_disabled = getMappedRegValue<HWOffsetFix<1,0,UNSIGNED> >("io_a_force_disabled");
-  }
-  { // Node ID: 3 (NodeInputMappedReg)
-    id3out_io_b_force_disabled = getMappedRegValue<HWOffsetFix<1,0,UNSIGNED> >("io_b_force_disabled");
-  }
-  { // Node ID: 22 (NodeInputMappedReg)
-    id22out_run_cycle_count = getMappedRegValue<HWOffsetFix<48,0,UNSIGNED> >("run_cycle_count");
-  }
-}
-
-void StreamFMAKernel::preExecute() {
-  { // Node ID: 2 (NodeInput)
-    if(((needsToReadInput(m_a))&(((getFlushLevel())<((4l)+(5)))|(!(isFlushingActive()))))) {
-      (id2st_last_read_value) = (readInput<HWOffsetFix<32,0,TWOSCOMPLEMENT> >(m_a));
-    }
-    id2out_data = (id2st_last_read_value);
-  }
-  { // Node ID: 5 (NodeInput)
-    if(((needsToReadInput(m_b))&(((getFlushLevel())<((4l)+(5)))|(!(isFlushingActive()))))) {
-      (id5st_last_read_value) = (readInput<HWOffsetFix<32,0,TWOSCOMPLEMENT> >(m_b));
-    }
-    id5out_data = (id5st_last_read_value);
-  }
-}
-
-void StreamFMAKernel::runComputationCycle() {
-  if (m_mappedElementsChanged) {
-    m_mappedElementsChanged = false;
-    updateState();
-    std::cout << "StreamFMAKernel: Mapped Elements Changed: Reloaded" << std::endl;
-  }
-  preExecute();
-  execute0();
-}
-
-int StreamFMAKernel::getFlushLevelStart() {
-  return ((1l)+(3l));
-}
-
-}

+ 0 - 79
tests/StreamFMA_MAX5C_DFE_SIM/scratch/software-sim/build/StreamFMAKernel.h

@@ -1,79 +0,0 @@
-#ifndef STREAMFMAKERNEL_H_
-#define STREAMFMAKERNEL_H_
-
-// #include "KernelManagerBlockSync.h"
-
-
-namespace maxcompilersim {
-
-class StreamFMAKernel : public KernelManagerBlockSync {
-public:
-  StreamFMAKernel(const std::string &instance_name);
-
-protected:
-  virtual void runComputationCycle();
-  virtual void resetComputation();
-  virtual void resetComputationAfterFlush();
-          void updateState();
-          void preExecute();
-  virtual int  getFlushLevelStart();
-
-private:
-  t_port_number m_a;
-  t_port_number m_b;
-  t_port_number m_output;
-  HWOffsetFix<1,0,UNSIGNED> id8out_io_output_force_disabled;
-
-  HWOffsetFix<1,0,UNSIGNED> id0out_io_a_force_disabled;
-
-  HWOffsetFix<32,0,TWOSCOMPLEMENT> id2out_data;
-
-  HWOffsetFix<1,0,UNSIGNED> id2st_read_next_cycle;
-  HWOffsetFix<32,0,TWOSCOMPLEMENT> id2st_last_read_value;
-
-  HWOffsetFix<1,0,UNSIGNED> id3out_io_b_force_disabled;
-
-  HWOffsetFix<32,0,TWOSCOMPLEMENT> id5out_data;
-
-  HWOffsetFix<1,0,UNSIGNED> id5st_read_next_cycle;
-  HWOffsetFix<32,0,TWOSCOMPLEMENT> id5st_last_read_value;
-
-  HWOffsetFix<32,0,TWOSCOMPLEMENT> id6out_result[2];
-
-  HWOffsetFix<1,0,UNSIGNED> id16out_value;
-
-  HWOffsetFix<1,0,UNSIGNED> id26out_value;
-
-  HWOffsetFix<49,0,UNSIGNED> id13out_value;
-
-  HWOffsetFix<48,0,UNSIGNED> id14out_count;
-  HWOffsetFix<1,0,UNSIGNED> id14out_wrap;
-
-  HWOffsetFix<49,0,UNSIGNED> id14st_count;
-
-  HWOffsetFix<1,0,UNSIGNED> id25out_value;
-
-  HWOffsetFix<49,0,UNSIGNED> id19out_value;
-
-  HWOffsetFix<48,0,UNSIGNED> id20out_count;
-  HWOffsetFix<1,0,UNSIGNED> id20out_wrap;
-
-  HWOffsetFix<49,0,UNSIGNED> id20st_count;
-
-  HWOffsetFix<48,0,UNSIGNED> id22out_run_cycle_count;
-
-  HWOffsetFix<1,0,UNSIGNED> id24out_result[2];
-
-  const HWOffsetFix<1,0,UNSIGNED> c_hw_fix_1_0_uns_bits;
-  const HWOffsetFix<32,0,TWOSCOMPLEMENT> c_hw_fix_32_0_sgn_undef;
-  const HWOffsetFix<1,0,UNSIGNED> c_hw_fix_1_0_uns_bits_1;
-  const HWOffsetFix<49,0,UNSIGNED> c_hw_fix_49_0_uns_bits;
-  const HWOffsetFix<49,0,UNSIGNED> c_hw_fix_49_0_uns_bits_1;
-  const HWOffsetFix<49,0,UNSIGNED> c_hw_fix_49_0_uns_bits_2;
-
-  void execute0();
-};
-
-}
-
-#endif /* STREAMFMAKERNEL_H_ */

+ 0 - 31
tests/StreamFMA_MAX5C_DFE_SIM/scratch/software-sim/build/StreamFMAKernel_Templates.cpp

@@ -1,31 +0,0 @@
-#include "stdsimheader.h"
-
-using namespace maxcompilersim;
-
-namespace maxcompilersim {
-// Templated Types used in the kernel
-template class HWOffsetFix<48,0,UNSIGNED>;
-template class HWOffsetFix<49,0,UNSIGNED>;
-template class HWOffsetFix<32,0,TWOSCOMPLEMENT>;
-template class HWOffsetFix<1,0,UNSIGNED>;
-// add. templates from the default formatter 
-
-
-// Templated Methods/Functions
-template HWOffsetFix<48,0,UNSIGNED> KernelManagerBlockSync::getMappedRegValue< HWOffsetFix<48,0,UNSIGNED> >(const std::string &name);
-template HWOffsetFix<49,0,UNSIGNED>add_fixed <49,0,UNSIGNED,TRUNCATE,49,0,UNSIGNED,49,0,UNSIGNED, false>(const HWOffsetFix<49,0,UNSIGNED> &a, const HWOffsetFix<49,0,UNSIGNED> &b , EXCEPTOVERFLOW);
-template HWOffsetFix<32,0,TWOSCOMPLEMENT>add_fixed <32,0,TWOSCOMPLEMENT,TONEAREVEN,32,0,TWOSCOMPLEMENT,32,0,TWOSCOMPLEMENT, false>(const HWOffsetFix<32,0,TWOSCOMPLEMENT> &a, const HWOffsetFix<32,0,TWOSCOMPLEMENT> &b , EXCEPTOVERFLOW);
-template void KernelManagerBlockSync::setMappedRegValue< HWOffsetFix<48,0,UNSIGNED> >(const std::string &name, const HWOffsetFix<48,0,UNSIGNED> & value);
-template HWOffsetFix<1,0,UNSIGNED>eq_fixed<>(const HWOffsetFix<48,0,UNSIGNED> &a, const HWOffsetFix<48,0,UNSIGNED> &b );
-template void KernelManagerBlockSync::writeOutput< HWOffsetFix<32,0,TWOSCOMPLEMENT> >(const t_port_number port_number, const HWOffsetFix<32,0,TWOSCOMPLEMENT> &value);
-template HWOffsetFix<1,0,UNSIGNED>gte_fixed<>(const HWOffsetFix<49,0,UNSIGNED> &a, const HWOffsetFix<49,0,UNSIGNED> &b );
-template HWOffsetFix<48,0,UNSIGNED> cast_fixed2fixed<48,0,UNSIGNED,TRUNCATE>(const HWOffsetFix<49,0,UNSIGNED> &a);
-template HWOffsetFix<32,0,TWOSCOMPLEMENT> KernelManagerBlockSync::readInput< HWOffsetFix<32,0,TWOSCOMPLEMENT> >(const t_port_number port_number);
-template HWOffsetFix<1,0,UNSIGNED> KernelManagerBlockSync::getMappedRegValue< HWOffsetFix<1,0,UNSIGNED> >(const std::string &name);
-template HWOffsetFix<1,0,UNSIGNED>not_fixed<>(const HWOffsetFix<1,0,UNSIGNED> &a );
-template HWOffsetFix<1,0,UNSIGNED>and_fixed<>(const HWOffsetFix<1,0,UNSIGNED> &a, const HWOffsetFix<1,0,UNSIGNED> &b );
-
-
-// Additional Code
-
-} // End of maxcompilersim namespace

+ 0 - 166
tests/StreamFMA_MAX5C_DFE_SIM/scratch/software-sim/build/StreamFMAKernel_exec0.cpp

@@ -1,166 +0,0 @@
-#include "stdsimheader.h"
-
-namespace maxcompilersim {
-
-void StreamFMAKernel::execute0() {
-  { // Node ID: 8 (NodeInputMappedReg)
-  }
-  HWOffsetFix<1,0,UNSIGNED> id9out_result;
-
-  { // Node ID: 9 (NodeNot)
-    const HWOffsetFix<1,0,UNSIGNED> &id9in_a = id8out_io_output_force_disabled;
-
-    id9out_result = (not_fixed(id9in_a));
-  }
-  { // Node ID: 0 (NodeInputMappedReg)
-  }
-  HWOffsetFix<1,0,UNSIGNED> id1out_result;
-
-  { // Node ID: 1 (NodeNot)
-    const HWOffsetFix<1,0,UNSIGNED> &id1in_a = id0out_io_a_force_disabled;
-
-    id1out_result = (not_fixed(id1in_a));
-  }
-  if ( (getFillLevel() >= (4l)))
-  { // Node ID: 2 (NodeInput)
-    const HWOffsetFix<1,0,UNSIGNED> &id2in_enable = id1out_result;
-
-    (id2st_read_next_cycle) = ((id2in_enable.getValueAsBool())&(!(((getFlushLevel())>=(4l))&(isFlushingActive()))));
-    queueReadRequest(m_a, id2st_read_next_cycle.getValueAsBool());
-  }
-  { // Node ID: 3 (NodeInputMappedReg)
-  }
-  HWOffsetFix<1,0,UNSIGNED> id4out_result;
-
-  { // Node ID: 4 (NodeNot)
-    const HWOffsetFix<1,0,UNSIGNED> &id4in_a = id3out_io_b_force_disabled;
-
-    id4out_result = (not_fixed(id4in_a));
-  }
-  if ( (getFillLevel() >= (4l)))
-  { // Node ID: 5 (NodeInput)
-    const HWOffsetFix<1,0,UNSIGNED> &id5in_enable = id4out_result;
-
-    (id5st_read_next_cycle) = ((id5in_enable.getValueAsBool())&(!(((getFlushLevel())>=(4l))&(isFlushingActive()))));
-    queueReadRequest(m_b, id5st_read_next_cycle.getValueAsBool());
-  }
-  { // Node ID: 6 (NodeAdd)
-    const HWOffsetFix<32,0,TWOSCOMPLEMENT> &id6in_a = id2out_data;
-    const HWOffsetFix<32,0,TWOSCOMPLEMENT> &id6in_b = id5out_data;
-
-    id6out_result[(getCycle()+1)%2] = (add_fixed<32,0,TWOSCOMPLEMENT,TONEAREVEN>(id6in_a,id6in_b));
-  }
-  if ( (getFillLevel() >= (10l)) && (getFlushLevel() < (10l)|| !isFlushingActive() ))
-  { // Node ID: 11 (NodeOutput)
-    const HWOffsetFix<1,0,UNSIGNED> &id11in_output_control = id9out_result;
-    const HWOffsetFix<32,0,TWOSCOMPLEMENT> &id11in_data = id6out_result[getCycle()%2];
-
-    bool id11x_1;
-
-    (id11x_1) = ((id11in_output_control.getValueAsBool())&(!(((getFlushLevel())>=(10l))&(isFlushingActive()))));
-    if((id11x_1)) {
-      writeOutput(m_output, id11in_data);
-    }
-  }
-  { // Node ID: 16 (NodeConstantRawBits)
-  }
-  { // Node ID: 26 (NodeConstantRawBits)
-  }
-  { // Node ID: 13 (NodeConstantRawBits)
-  }
-  if ( (getFillLevel() >= (3l)))
-  { // Node ID: 14 (NodeCounter)
-    const HWOffsetFix<1,0,UNSIGNED> &id14in_enable = id26out_value;
-    const HWOffsetFix<49,0,UNSIGNED> &id14in_max = id13out_value;
-
-    HWOffsetFix<49,0,UNSIGNED> id14x_1;
-    HWOffsetFix<1,0,UNSIGNED> id14x_2;
-    HWOffsetFix<1,0,UNSIGNED> id14x_3;
-    HWOffsetFix<49,0,UNSIGNED> id14x_4t_1e_1;
-
-    id14out_count = (cast_fixed2fixed<48,0,UNSIGNED,TRUNCATE>((id14st_count)));
-    (id14x_1) = (add_fixed<49,0,UNSIGNED,TRUNCATE>((id14st_count),(c_hw_fix_49_0_uns_bits_2)));
-    (id14x_2) = (gte_fixed((id14x_1),id14in_max));
-    (id14x_3) = (and_fixed((id14x_2),id14in_enable));
-    id14out_wrap = (id14x_3);
-    if((id14in_enable.getValueAsBool())) {
-      if(((id14x_3).getValueAsBool())) {
-        (id14st_count) = (c_hw_fix_49_0_uns_bits_1);
-      }
-      else {
-        (id14x_4t_1e_1) = (id14x_1);
-        (id14st_count) = (id14x_4t_1e_1);
-      }
-    }
-    else {
-    }
-  }
-  HWOffsetFix<48,0,UNSIGNED> id15out_output;
-
-  { // Node ID: 15 (NodeStreamOffset)
-    const HWOffsetFix<48,0,UNSIGNED> &id15in_input = id14out_count;
-
-    id15out_output = id15in_input;
-  }
-  if ( (getFillLevel() >= (4l)) && (getFlushLevel() < (4l)|| !isFlushingActive() ))
-  { // Node ID: 17 (NodeOutputMappedReg)
-    const HWOffsetFix<1,0,UNSIGNED> &id17in_load = id16out_value;
-    const HWOffsetFix<48,0,UNSIGNED> &id17in_data = id15out_output;
-
-    bool id17x_1;
-
-    (id17x_1) = ((id17in_load.getValueAsBool())&(!(((getFlushLevel())>=(4l))&(isFlushingActive()))));
-    if((id17x_1)) {
-      setMappedRegValue("current_run_cycle_count", id17in_data);
-    }
-  }
-  { // Node ID: 25 (NodeConstantRawBits)
-  }
-  { // Node ID: 19 (NodeConstantRawBits)
-  }
-  if ( (getFillLevel() >= (0l)))
-  { // Node ID: 20 (NodeCounter)
-    const HWOffsetFix<1,0,UNSIGNED> &id20in_enable = id25out_value;
-    const HWOffsetFix<49,0,UNSIGNED> &id20in_max = id19out_value;
-
-    HWOffsetFix<49,0,UNSIGNED> id20x_1;
-    HWOffsetFix<1,0,UNSIGNED> id20x_2;
-    HWOffsetFix<1,0,UNSIGNED> id20x_3;
-    HWOffsetFix<49,0,UNSIGNED> id20x_4t_1e_1;
-
-    id20out_count = (cast_fixed2fixed<48,0,UNSIGNED,TRUNCATE>((id20st_count)));
-    (id20x_1) = (add_fixed<49,0,UNSIGNED,TRUNCATE>((id20st_count),(c_hw_fix_49_0_uns_bits_2)));
-    (id20x_2) = (gte_fixed((id20x_1),id20in_max));
-    (id20x_3) = (and_fixed((id20x_2),id20in_enable));
-    id20out_wrap = (id20x_3);
-    if((id20in_enable.getValueAsBool())) {
-      if(((id20x_3).getValueAsBool())) {
-        (id20st_count) = (c_hw_fix_49_0_uns_bits_1);
-      }
-      else {
-        (id20x_4t_1e_1) = (id20x_1);
-        (id20st_count) = (id20x_4t_1e_1);
-      }
-    }
-    else {
-    }
-  }
-  { // Node ID: 22 (NodeInputMappedReg)
-  }
-  { // Node ID: 24 (NodeEqInlined)
-    const HWOffsetFix<48,0,UNSIGNED> &id24in_a = id20out_count;
-    const HWOffsetFix<48,0,UNSIGNED> &id24in_b = id22out_run_cycle_count;
-
-    id24out_result[(getCycle()+1)%2] = (eq_fixed(id24in_a,id24in_b));
-  }
-  if ( (getFillLevel() >= (1l)))
-  { // Node ID: 21 (NodeFlush)
-    const HWOffsetFix<1,0,UNSIGNED> &id21in_start = id24out_result[getCycle()%2];
-
-    if((id21in_start.getValueAsBool())) {
-      startFlushing();
-    }
-  }
-};
-
-};

+ 0 - 35
tests/StreamFMA_MAX5C_DFE_SIM/scratch/software-sim/build/objdir/StreamFMAKernel.O0.d

@@ -1,35 +0,0 @@
-objdir/StreamFMAKernel.O0.o: StreamFMAKernel.cpp \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/api/stdsimheader.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/HWTypes.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/varint_u.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/varint_s.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/HWExceptionDispatch.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/HWRawBits_decl.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/HWFloat_decl.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/HWOffsetFix_decl.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/HWRawBits_impl.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/HWFloat_impl.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/HWOffsetFix_impl.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/KernelManagerBlockSync.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/ManagerSync.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/CondVar.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/Thread.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/ManagerBlock.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/MappedElements.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/Data.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/DynamicVarUInt.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/SimException.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/include/maxrt_mec_common.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/include/max_types.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/include/maxrt_error.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/include/maxrt_core.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/include/maxdriver.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/include/maxerrors.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/include/max_list.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/PullSync.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/Connections.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/PushSync.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/Debuggable.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/DebugStreams.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/MappedElementInterface.h \
-  stdkernel_headers.h StreamFMAKernel.h

+ 0 - 35
tests/StreamFMA_MAX5C_DFE_SIM/scratch/software-sim/build/objdir/StreamFMAKernel_Templates.O2.d

@@ -1,35 +0,0 @@
-objdir/StreamFMAKernel_Templates.O2.o: StreamFMAKernel_Templates.cpp \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/api/stdsimheader.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/HWTypes.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/varint_u.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/varint_s.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/HWExceptionDispatch.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/HWRawBits_decl.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/HWFloat_decl.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/HWOffsetFix_decl.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/HWRawBits_impl.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/HWFloat_impl.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/HWOffsetFix_impl.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/KernelManagerBlockSync.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/ManagerSync.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/CondVar.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/Thread.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/ManagerBlock.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/MappedElements.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/Data.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/DynamicVarUInt.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/SimException.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/include/maxrt_mec_common.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/include/max_types.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/include/maxrt_error.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/include/maxrt_core.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/include/maxdriver.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/include/maxerrors.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/include/max_list.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/PullSync.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/Connections.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/PushSync.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/Debuggable.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/DebugStreams.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/MappedElementInterface.h \
-  stdkernel_headers.h StreamFMAKernel.h

+ 0 - 35
tests/StreamFMA_MAX5C_DFE_SIM/scratch/software-sim/build/objdir/StreamFMAKernel_exec0.O2.d

@@ -1,35 +0,0 @@
-objdir/StreamFMAKernel_exec0.O2.o: StreamFMAKernel_exec0.cpp \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/api/stdsimheader.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/HWTypes.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/varint_u.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/varint_s.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/HWExceptionDispatch.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/HWRawBits_decl.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/HWFloat_decl.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/HWOffsetFix_decl.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/HWRawBits_impl.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/HWFloat_impl.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/HWOffsetFix_impl.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/KernelManagerBlockSync.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/ManagerSync.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/CondVar.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/Thread.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/ManagerBlock.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/MappedElements.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/Data.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/DynamicVarUInt.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/SimException.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/include/maxrt_mec_common.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/include/max_types.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/include/maxrt_error.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/include/maxrt_core.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/include/maxdriver.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/include/maxerrors.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/include/max_list.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/PullSync.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/Connections.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/PushSync.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/Debuggable.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/DebugStreams.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/MappedElementInterface.h \
-  stdkernel_headers.h StreamFMAKernel.h

+ 0 - 74
tests/StreamFMA_MAX5C_DFE_SIM/scratch/software-sim/build/objdir/max_msi.d

@@ -1,74 +0,0 @@
-objdir/max_msi.o: \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/targets/DFE_SIM/max_msi.cpp \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/MaxFile.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/CapRegs.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/ManagerSync.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/CondVar.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/Thread.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/ManagerBlock.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/MappedElements.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/Data.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/DynamicVarUInt.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/HWTypes.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/varint_u.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/varint_s.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/HWExceptionDispatch.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/HWRawBits_decl.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/HWFloat_decl.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/HWOffsetFix_decl.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/HWRawBits_impl.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/HWFloat_impl.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/HWOffsetFix_impl.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/SimException.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/include/maxrt_mec_common.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/include/max_types.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/include/maxrt_error.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/include/maxrt_core.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/include/maxdriver.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/include/maxerrors.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/include/max_list.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/IFPGARegs.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/ChecksumMem.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/Demux.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/PushSync.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/Connections.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/DualAspectMux.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/PullSync.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/DualAspectReg.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/Fanout.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/Fifos.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/KernelManagerBlockSync.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/Debuggable.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/DebugStreams.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/MappedElementInterface.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/Mux.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/PCIe.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/SharedFIFO.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/max_shared_fifo.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/PullPushAdapter.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/FilePullSource.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/ManagerInfrastructure.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/FilePushSource.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/JavaSimLogger.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/FilePushSink.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/FilePushSinkJavaSim.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/Watch.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/AddressGenerator.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/MemoryControllerConfig.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/MemoryControllerCommand.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/AddressGeneratorStrings.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/MemoryControllerPro.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/MemoryControllerStreams.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/MemoryControllerRAM.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/MemoryControllerStrings.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/PipelinedStreams.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/StreamStatus.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/StructToGroupDummy.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/RunLengthExpander.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/Ethernet.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/LMemSim.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/LMemSimConfig.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/LMemSimRAM.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/simulator/include/Timestamp.h \
-  ../../MaxCompilerDesignData.dat StreamFMAKernel.h \
-  /opt/Software/maxeler/maxcompiler-2018.3.1/lib/maxeleros-sim/include/max_msi.h

+ 0 - 4
tests/StreamFMA_MAX5C_DFE_SIM/scratch/software-sim/build/stdkernel_headers.h

@@ -1,4 +0,0 @@
-#ifndef STDKERNEL_HEADERS_H_
-#define STDKERNEL_HEADERS_H_
-#include "StreamFMAKernel.h"
-#endif //STDKERNEL_HEADERS_H_

+ 0 - 4
tests/StreamFMA_MAX5C_DFE_SIM/scratch/software-sim/build/stdkernel_headers.h.tmp

@@ -1,4 +0,0 @@
-#ifndef STDKERNEL_HEADERS_H_
-#define STDKERNEL_HEADERS_H_
-#include "StreamFMAKernel.h"
-#endif //STDKERNEL_HEADERS_H_

+ 0 - 138
tests/StreamFMA_MAX5C_DFE_SIM/scratch/software-sim/build/tmp_resource_dump/StreamFMAKernel.cpp

@@ -1,138 +0,0 @@
-#include "stdsimheader.h"
-#include "StreamFMAKernel.h"
-
-namespace maxcompilersim {
-
-StreamFMAKernel::StreamFMAKernel(const std::string &instance_name) : 
-  ManagerBlockSync(instance_name),
-  KernelManagerBlockSync(instance_name, 10, 2, 0, 0, "",1)
-, c_hw_fix_1_0_uns_bits((HWOffsetFix<1,0,UNSIGNED>(varint_u<1>(0x0l))))
-, c_hw_fix_32_0_sgn_undef((HWOffsetFix<32,0,TWOSCOMPLEMENT>()))
-, c_hw_fix_1_0_uns_bits_1((HWOffsetFix<1,0,UNSIGNED>(varint_u<1>(0x1l))))
-, c_hw_fix_49_0_uns_bits((HWOffsetFix<49,0,UNSIGNED>(varint_u<49>(0x1000000000000l))))
-, c_hw_fix_49_0_uns_bits_1((HWOffsetFix<49,0,UNSIGNED>(varint_u<49>(0x0000000000000l))))
-, c_hw_fix_49_0_uns_bits_2((HWOffsetFix<49,0,UNSIGNED>(varint_u<49>(0x0000000000001l))))
-{
-  { // Node ID: 8 (NodeInputMappedReg)
-    registerMappedRegister("io_output_force_disabled", Data(1));
-  }
-  { // Node ID: 0 (NodeInputMappedReg)
-    registerMappedRegister("io_a_force_disabled", Data(1));
-  }
-  { // Node ID: 2 (NodeInput)
-     m_a =  registerInput("a",0,5);
-  }
-  { // Node ID: 3 (NodeInputMappedReg)
-    registerMappedRegister("io_b_force_disabled", Data(1));
-  }
-  { // Node ID: 5 (NodeInput)
-     m_b =  registerInput("b",1,5);
-  }
-  { // Node ID: 11 (NodeOutput)
-    m_output = registerOutput("output",0 );
-  }
-  { // Node ID: 16 (NodeConstantRawBits)
-    id16out_value = (c_hw_fix_1_0_uns_bits_1);
-  }
-  { // Node ID: 26 (NodeConstantRawBits)
-    id26out_value = (c_hw_fix_1_0_uns_bits_1);
-  }
-  { // Node ID: 13 (NodeConstantRawBits)
-    id13out_value = (c_hw_fix_49_0_uns_bits);
-  }
-  { // Node ID: 17 (NodeOutputMappedReg)
-    registerMappedRegister("current_run_cycle_count", Data(48), true);
-  }
-  { // Node ID: 25 (NodeConstantRawBits)
-    id25out_value = (c_hw_fix_1_0_uns_bits_1);
-  }
-  { // Node ID: 19 (NodeConstantRawBits)
-    id19out_value = (c_hw_fix_49_0_uns_bits);
-  }
-  { // Node ID: 22 (NodeInputMappedReg)
-    registerMappedRegister("run_cycle_count", Data(48));
-  }
-}
-
-void StreamFMAKernel::resetComputation() {
-  resetComputationAfterFlush();
-}
-
-void StreamFMAKernel::resetComputationAfterFlush() {
-  { // Node ID: 8 (NodeInputMappedReg)
-    id8out_io_output_force_disabled = getMappedRegValue<HWOffsetFix<1,0,UNSIGNED> >("io_output_force_disabled");
-  }
-  { // Node ID: 0 (NodeInputMappedReg)
-    id0out_io_a_force_disabled = getMappedRegValue<HWOffsetFix<1,0,UNSIGNED> >("io_a_force_disabled");
-  }
-  { // Node ID: 2 (NodeInput)
-
-    (id2st_read_next_cycle) = (c_hw_fix_1_0_uns_bits);
-    (id2st_last_read_value) = (c_hw_fix_32_0_sgn_undef);
-  }
-  { // Node ID: 3 (NodeInputMappedReg)
-    id3out_io_b_force_disabled = getMappedRegValue<HWOffsetFix<1,0,UNSIGNED> >("io_b_force_disabled");
-  }
-  { // Node ID: 5 (NodeInput)
-
-    (id5st_read_next_cycle) = (c_hw_fix_1_0_uns_bits);
-    (id5st_last_read_value) = (c_hw_fix_32_0_sgn_undef);
-  }
-  { // Node ID: 14 (NodeCounter)
-
-    (id14st_count) = (c_hw_fix_49_0_uns_bits_1);
-  }
-  { // Node ID: 20 (NodeCounter)
-
-    (id20st_count) = (c_hw_fix_49_0_uns_bits_1);
-  }
-  { // Node ID: 22 (NodeInputMappedReg)
-    id22out_run_cycle_count = getMappedRegValue<HWOffsetFix<48,0,UNSIGNED> >("run_cycle_count");
-  }
-}
-
-void StreamFMAKernel::updateState() {
-  { // Node ID: 8 (NodeInputMappedReg)
-    id8out_io_output_force_disabled = getMappedRegValue<HWOffsetFix<1,0,UNSIGNED> >("io_output_force_disabled");
-  }
-  { // Node ID: 0 (NodeInputMappedReg)
-    id0out_io_a_force_disabled = getMappedRegValue<HWOffsetFix<1,0,UNSIGNED> >("io_a_force_disabled");
-  }
-  { // Node ID: 3 (NodeInputMappedReg)
-    id3out_io_b_force_disabled = getMappedRegValue<HWOffsetFix<1,0,UNSIGNED> >("io_b_force_disabled");
-  }
-  { // Node ID: 22 (NodeInputMappedReg)
-    id22out_run_cycle_count = getMappedRegValue<HWOffsetFix<48,0,UNSIGNED> >("run_cycle_count");
-  }
-}
-
-void StreamFMAKernel::preExecute() {
-  { // Node ID: 2 (NodeInput)
-    if(((needsToReadInput(m_a))&(((getFlushLevel())<((4l)+(5)))|(!(isFlushingActive()))))) {
-      (id2st_last_read_value) = (readInput<HWOffsetFix<32,0,TWOSCOMPLEMENT> >(m_a));
-    }
-    id2out_data = (id2st_last_read_value);
-  }
-  { // Node ID: 5 (NodeInput)
-    if(((needsToReadInput(m_b))&(((getFlushLevel())<((4l)+(5)))|(!(isFlushingActive()))))) {
-      (id5st_last_read_value) = (readInput<HWOffsetFix<32,0,TWOSCOMPLEMENT> >(m_b));
-    }
-    id5out_data = (id5st_last_read_value);
-  }
-}
-
-void StreamFMAKernel::runComputationCycle() {
-  if (m_mappedElementsChanged) {
-    m_mappedElementsChanged = false;
-    updateState();
-    std::cout << "StreamFMAKernel: Mapped Elements Changed: Reloaded" << std::endl;
-  }
-  preExecute();
-  execute0();
-}
-
-int StreamFMAKernel::getFlushLevelStart() {
-  return ((1l)+(3l));
-}
-
-}

+ 0 - 79
tests/StreamFMA_MAX5C_DFE_SIM/scratch/software-sim/build/tmp_resource_dump/StreamFMAKernel.h

@@ -1,79 +0,0 @@
-#ifndef STREAMFMAKERNEL_H_
-#define STREAMFMAKERNEL_H_
-
-// #include "KernelManagerBlockSync.h"
-
-
-namespace maxcompilersim {
-
-class StreamFMAKernel : public KernelManagerBlockSync {
-public:
-  StreamFMAKernel(const std::string &instance_name);
-
-protected:
-  virtual void runComputationCycle();
-  virtual void resetComputation();
-  virtual void resetComputationAfterFlush();
-          void updateState();
-          void preExecute();
-  virtual int  getFlushLevelStart();
-
-private:
-  t_port_number m_a;
-  t_port_number m_b;
-  t_port_number m_output;
-  HWOffsetFix<1,0,UNSIGNED> id8out_io_output_force_disabled;
-
-  HWOffsetFix<1,0,UNSIGNED> id0out_io_a_force_disabled;
-
-  HWOffsetFix<32,0,TWOSCOMPLEMENT> id2out_data;
-
-  HWOffsetFix<1,0,UNSIGNED> id2st_read_next_cycle;
-  HWOffsetFix<32,0,TWOSCOMPLEMENT> id2st_last_read_value;
-
-  HWOffsetFix<1,0,UNSIGNED> id3out_io_b_force_disabled;
-
-  HWOffsetFix<32,0,TWOSCOMPLEMENT> id5out_data;
-
-  HWOffsetFix<1,0,UNSIGNED> id5st_read_next_cycle;
-  HWOffsetFix<32,0,TWOSCOMPLEMENT> id5st_last_read_value;
-
-  HWOffsetFix<32,0,TWOSCOMPLEMENT> id6out_result[2];
-
-  HWOffsetFix<1,0,UNSIGNED> id16out_value;
-
-  HWOffsetFix<1,0,UNSIGNED> id26out_value;
-
-  HWOffsetFix<49,0,UNSIGNED> id13out_value;
-
-  HWOffsetFix<48,0,UNSIGNED> id14out_count;
-  HWOffsetFix<1,0,UNSIGNED> id14out_wrap;
-
-  HWOffsetFix<49,0,UNSIGNED> id14st_count;
-
-  HWOffsetFix<1,0,UNSIGNED> id25out_value;
-
-  HWOffsetFix<49,0,UNSIGNED> id19out_value;
-
-  HWOffsetFix<48,0,UNSIGNED> id20out_count;
-  HWOffsetFix<1,0,UNSIGNED> id20out_wrap;
-
-  HWOffsetFix<49,0,UNSIGNED> id20st_count;
-
-  HWOffsetFix<48,0,UNSIGNED> id22out_run_cycle_count;
-
-  HWOffsetFix<1,0,UNSIGNED> id24out_result[2];
-
-  const HWOffsetFix<1,0,UNSIGNED> c_hw_fix_1_0_uns_bits;
-  const HWOffsetFix<32,0,TWOSCOMPLEMENT> c_hw_fix_32_0_sgn_undef;
-  const HWOffsetFix<1,0,UNSIGNED> c_hw_fix_1_0_uns_bits_1;
-  const HWOffsetFix<49,0,UNSIGNED> c_hw_fix_49_0_uns_bits;
-  const HWOffsetFix<49,0,UNSIGNED> c_hw_fix_49_0_uns_bits_1;
-  const HWOffsetFix<49,0,UNSIGNED> c_hw_fix_49_0_uns_bits_2;
-
-  void execute0();
-};
-
-}
-
-#endif /* STREAMFMAKERNEL_H_ */

+ 0 - 31
tests/StreamFMA_MAX5C_DFE_SIM/scratch/software-sim/build/tmp_resource_dump/StreamFMAKernel_Templates.cpp

@@ -1,31 +0,0 @@
-#include "stdsimheader.h"
-
-using namespace maxcompilersim;
-
-namespace maxcompilersim {
-// Templated Types used in the kernel
-template class HWOffsetFix<48,0,UNSIGNED>;
-template class HWOffsetFix<49,0,UNSIGNED>;
-template class HWOffsetFix<32,0,TWOSCOMPLEMENT>;
-template class HWOffsetFix<1,0,UNSIGNED>;
-// add. templates from the default formatter 
-
-
-// Templated Methods/Functions
-template HWOffsetFix<48,0,UNSIGNED> KernelManagerBlockSync::getMappedRegValue< HWOffsetFix<48,0,UNSIGNED> >(const std::string &name);
-template HWOffsetFix<49,0,UNSIGNED>add_fixed <49,0,UNSIGNED,TRUNCATE,49,0,UNSIGNED,49,0,UNSIGNED, false>(const HWOffsetFix<49,0,UNSIGNED> &a, const HWOffsetFix<49,0,UNSIGNED> &b , EXCEPTOVERFLOW);
-template HWOffsetFix<32,0,TWOSCOMPLEMENT>add_fixed <32,0,TWOSCOMPLEMENT,TONEAREVEN,32,0,TWOSCOMPLEMENT,32,0,TWOSCOMPLEMENT, false>(const HWOffsetFix<32,0,TWOSCOMPLEMENT> &a, const HWOffsetFix<32,0,TWOSCOMPLEMENT> &b , EXCEPTOVERFLOW);
-template void KernelManagerBlockSync::setMappedRegValue< HWOffsetFix<48,0,UNSIGNED> >(const std::string &name, const HWOffsetFix<48,0,UNSIGNED> & value);
-template HWOffsetFix<1,0,UNSIGNED>eq_fixed<>(const HWOffsetFix<48,0,UNSIGNED> &a, const HWOffsetFix<48,0,UNSIGNED> &b );
-template void KernelManagerBlockSync::writeOutput< HWOffsetFix<32,0,TWOSCOMPLEMENT> >(const t_port_number port_number, const HWOffsetFix<32,0,TWOSCOMPLEMENT> &value);
-template HWOffsetFix<1,0,UNSIGNED>gte_fixed<>(const HWOffsetFix<49,0,UNSIGNED> &a, const HWOffsetFix<49,0,UNSIGNED> &b );
-template HWOffsetFix<48,0,UNSIGNED> cast_fixed2fixed<48,0,UNSIGNED,TRUNCATE>(const HWOffsetFix<49,0,UNSIGNED> &a);
-template HWOffsetFix<32,0,TWOSCOMPLEMENT> KernelManagerBlockSync::readInput< HWOffsetFix<32,0,TWOSCOMPLEMENT> >(const t_port_number port_number);
-template HWOffsetFix<1,0,UNSIGNED> KernelManagerBlockSync::getMappedRegValue< HWOffsetFix<1,0,UNSIGNED> >(const std::string &name);
-template HWOffsetFix<1,0,UNSIGNED>not_fixed<>(const HWOffsetFix<1,0,UNSIGNED> &a );
-template HWOffsetFix<1,0,UNSIGNED>and_fixed<>(const HWOffsetFix<1,0,UNSIGNED> &a, const HWOffsetFix<1,0,UNSIGNED> &b );
-
-
-// Additional Code
-
-} // End of maxcompilersim namespace

+ 0 - 166
tests/StreamFMA_MAX5C_DFE_SIM/scratch/software-sim/build/tmp_resource_dump/StreamFMAKernel_exec0.cpp

@@ -1,166 +0,0 @@
-#include "stdsimheader.h"
-
-namespace maxcompilersim {
-
-void StreamFMAKernel::execute0() {
-  { // Node ID: 8 (NodeInputMappedReg)
-  }
-  HWOffsetFix<1,0,UNSIGNED> id9out_result;
-
-  { // Node ID: 9 (NodeNot)
-    const HWOffsetFix<1,0,UNSIGNED> &id9in_a = id8out_io_output_force_disabled;
-
-    id9out_result = (not_fixed(id9in_a));
-  }
-  { // Node ID: 0 (NodeInputMappedReg)
-  }
-  HWOffsetFix<1,0,UNSIGNED> id1out_result;
-
-  { // Node ID: 1 (NodeNot)
-    const HWOffsetFix<1,0,UNSIGNED> &id1in_a = id0out_io_a_force_disabled;
-
-    id1out_result = (not_fixed(id1in_a));
-  }
-  if ( (getFillLevel() >= (4l)))
-  { // Node ID: 2 (NodeInput)
-    const HWOffsetFix<1,0,UNSIGNED> &id2in_enable = id1out_result;
-
-    (id2st_read_next_cycle) = ((id2in_enable.getValueAsBool())&(!(((getFlushLevel())>=(4l))&(isFlushingActive()))));
-    queueReadRequest(m_a, id2st_read_next_cycle.getValueAsBool());
-  }
-  { // Node ID: 3 (NodeInputMappedReg)
-  }
-  HWOffsetFix<1,0,UNSIGNED> id4out_result;
-
-  { // Node ID: 4 (NodeNot)
-    const HWOffsetFix<1,0,UNSIGNED> &id4in_a = id3out_io_b_force_disabled;
-
-    id4out_result = (not_fixed(id4in_a));
-  }
-  if ( (getFillLevel() >= (4l)))
-  { // Node ID: 5 (NodeInput)
-    const HWOffsetFix<1,0,UNSIGNED> &id5in_enable = id4out_result;
-
-    (id5st_read_next_cycle) = ((id5in_enable.getValueAsBool())&(!(((getFlushLevel())>=(4l))&(isFlushingActive()))));
-    queueReadRequest(m_b, id5st_read_next_cycle.getValueAsBool());
-  }
-  { // Node ID: 6 (NodeAdd)
-    const HWOffsetFix<32,0,TWOSCOMPLEMENT> &id6in_a = id2out_data;
-    const HWOffsetFix<32,0,TWOSCOMPLEMENT> &id6in_b = id5out_data;
-
-    id6out_result[(getCycle()+1)%2] = (add_fixed<32,0,TWOSCOMPLEMENT,TONEAREVEN>(id6in_a,id6in_b));
-  }
-  if ( (getFillLevel() >= (10l)) && (getFlushLevel() < (10l)|| !isFlushingActive() ))
-  { // Node ID: 11 (NodeOutput)
-    const HWOffsetFix<1,0,UNSIGNED> &id11in_output_control = id9out_result;
-    const HWOffsetFix<32,0,TWOSCOMPLEMENT> &id11in_data = id6out_result[getCycle()%2];
-
-    bool id11x_1;
-
-    (id11x_1) = ((id11in_output_control.getValueAsBool())&(!(((getFlushLevel())>=(10l))&(isFlushingActive()))));
-    if((id11x_1)) {
-      writeOutput(m_output, id11in_data);
-    }
-  }
-  { // Node ID: 16 (NodeConstantRawBits)
-  }
-  { // Node ID: 26 (NodeConstantRawBits)
-  }
-  { // Node ID: 13 (NodeConstantRawBits)
-  }
-  if ( (getFillLevel() >= (3l)))
-  { // Node ID: 14 (NodeCounter)
-    const HWOffsetFix<1,0,UNSIGNED> &id14in_enable = id26out_value;
-    const HWOffsetFix<49,0,UNSIGNED> &id14in_max = id13out_value;
-
-    HWOffsetFix<49,0,UNSIGNED> id14x_1;
-    HWOffsetFix<1,0,UNSIGNED> id14x_2;
-    HWOffsetFix<1,0,UNSIGNED> id14x_3;
-    HWOffsetFix<49,0,UNSIGNED> id14x_4t_1e_1;
-
-    id14out_count = (cast_fixed2fixed<48,0,UNSIGNED,TRUNCATE>((id14st_count)));
-    (id14x_1) = (add_fixed<49,0,UNSIGNED,TRUNCATE>((id14st_count),(c_hw_fix_49_0_uns_bits_2)));
-    (id14x_2) = (gte_fixed((id14x_1),id14in_max));
-    (id14x_3) = (and_fixed((id14x_2),id14in_enable));
-    id14out_wrap = (id14x_3);
-    if((id14in_enable.getValueAsBool())) {
-      if(((id14x_3).getValueAsBool())) {
-        (id14st_count) = (c_hw_fix_49_0_uns_bits_1);
-      }
-      else {
-        (id14x_4t_1e_1) = (id14x_1);
-        (id14st_count) = (id14x_4t_1e_1);
-      }
-    }
-    else {
-    }
-  }
-  HWOffsetFix<48,0,UNSIGNED> id15out_output;
-
-  { // Node ID: 15 (NodeStreamOffset)
-    const HWOffsetFix<48,0,UNSIGNED> &id15in_input = id14out_count;
-
-    id15out_output = id15in_input;
-  }
-  if ( (getFillLevel() >= (4l)) && (getFlushLevel() < (4l)|| !isFlushingActive() ))
-  { // Node ID: 17 (NodeOutputMappedReg)
-    const HWOffsetFix<1,0,UNSIGNED> &id17in_load = id16out_value;
-    const HWOffsetFix<48,0,UNSIGNED> &id17in_data = id15out_output;
-
-    bool id17x_1;
-
-    (id17x_1) = ((id17in_load.getValueAsBool())&(!(((getFlushLevel())>=(4l))&(isFlushingActive()))));
-    if((id17x_1)) {
-      setMappedRegValue("current_run_cycle_count", id17in_data);
-    }
-  }
-  { // Node ID: 25 (NodeConstantRawBits)
-  }
-  { // Node ID: 19 (NodeConstantRawBits)
-  }
-  if ( (getFillLevel() >= (0l)))
-  { // Node ID: 20 (NodeCounter)
-    const HWOffsetFix<1,0,UNSIGNED> &id20in_enable = id25out_value;
-    const HWOffsetFix<49,0,UNSIGNED> &id20in_max = id19out_value;
-
-    HWOffsetFix<49,0,UNSIGNED> id20x_1;
-    HWOffsetFix<1,0,UNSIGNED> id20x_2;
-    HWOffsetFix<1,0,UNSIGNED> id20x_3;
-    HWOffsetFix<49,0,UNSIGNED> id20x_4t_1e_1;
-
-    id20out_count = (cast_fixed2fixed<48,0,UNSIGNED,TRUNCATE>((id20st_count)));
-    (id20x_1) = (add_fixed<49,0,UNSIGNED,TRUNCATE>((id20st_count),(c_hw_fix_49_0_uns_bits_2)));
-    (id20x_2) = (gte_fixed((id20x_1),id20in_max));
-    (id20x_3) = (and_fixed((id20x_2),id20in_enable));
-    id20out_wrap = (id20x_3);
-    if((id20in_enable.getValueAsBool())) {
-      if(((id20x_3).getValueAsBool())) {
-        (id20st_count) = (c_hw_fix_49_0_uns_bits_1);
-      }
-      else {
-        (id20x_4t_1e_1) = (id20x_1);
-        (id20st_count) = (id20x_4t_1e_1);
-      }
-    }
-    else {
-    }
-  }
-  { // Node ID: 22 (NodeInputMappedReg)
-  }
-  { // Node ID: 24 (NodeEqInlined)
-    const HWOffsetFix<48,0,UNSIGNED> &id24in_a = id20out_count;
-    const HWOffsetFix<48,0,UNSIGNED> &id24in_b = id22out_run_cycle_count;
-
-    id24out_result[(getCycle()+1)%2] = (eq_fixed(id24in_a,id24in_b));
-  }
-  if ( (getFillLevel() >= (1l)))
-  { // Node ID: 21 (NodeFlush)
-    const HWOffsetFix<1,0,UNSIGNED> &id21in_start = id24out_result[getCycle()%2];
-
-    if((id21in_start.getValueAsBool())) {
-      startFlushing();
-    }
-  }
-};
-
-};

+ 0 - 11
tests/StreamFMA_MAX5C_DFE_SIM/scratch/userInputsAndDefaults.engParams

@@ -1,11 +0,0 @@
-#user parameters:
-DFEModel=MAIA
-maxFileName=StreamFMA
-target=DFE_SIM
-
-#default parameters:
-enableMPCX=false
-MPPRStartCT=1
-MPPREndCT=1
-MPPRThreads=1
-MPPRRetryThreshold=0