starpu-max/tests/StreamFMA_MAX5C_DFE_SIM/scratch/Manager_StreamFMA_Original.mxg

<?xml version="1.0" encoding="UTF-8" ?>
<ManagerGraph version="2018.3.1" design_name="Manager_StreamFMA" compilation_phase="Original" hardwareBuild="false">
	<Node id="5" instanceName="b" type="Input">
		<Output clock="PCIE" name="b" type="PUSH 2" width="128">
			<Stream name="Stream_6" sink="0" />
		</Output>
	</Node>
	<Node id="2" instanceName="a" type="Input">
		<Output clock="PCIE" name="a" type="PUSH 2" width="128">
			<Stream name="Stream_3" sink="0" />
		</Output>
	</Node>
	<Node id="0" instanceName="StreamFMAKernel" type="Kernel">
		<PxgFile phase="original">StreamFMA-StreamFMAKernel-original.pxg</PxgFile>
		<Input clock="STREAM" name="a" type="PULL el=1 ael=2" width="32">
			<Stream name="Stream_1" source="2" />
		</Input>
		<Input clock="STREAM" name="b" type="PULL el=1 ael=2" width="32">
			<Stream name="Stream_4" source="5" />
		</Input>
		<Output clock="STREAM" name="output" type="PUSH 5" width="32">
			<Stream name="Stream_9" sink="7" />
		</Output>
	</Node>
	<Node id="7" instanceName="output" type="Output">
		<Input clock="PCIE" name="output" type="PUSH 1" width="128">
			<Stream name="Stream_8" source="0" />
		</Input>
	</Node>
</ManagerGraph>