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  10. <title>ENeSCE 2017</title>
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  16. <h1>Energy-efficient Servers for Cloud and Edge Computing 2017 Workshop<br>(ENeSCE 2017)</h1>
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  20. <ul class="cd-tabs-navigation">
  21. <li><a data-content="home" class="selected" href="#0">Home</a></li>
  22. <li><a data-content="cfp" href="#0">Call For Papers</a></li>
  23. <li><a data-content="submission" href="#0">Paper Submission</a></li>
  24. <li><a data-content="cr-submission" href="#0">Camera Ready Submission
  25. Guidelines</a></li>
  26. <li><a data-content="finalprogram" href="#0">Final Program</a></li>
  27. <li><a data-content="contact" href="#0">Contact/ Committee</a></li>
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  32. <h3>Energy-efficient Servers for Cloud and Edge Computing 2017 Workshop,
  33. (ENeSCE 2017), is co-located with <a href="https://www.hipeac.net/2017/stockholm/">HiPEAC 2017</a> </h3>
  34. <h3>Scope of the workshop</h3>
  35. <p align="justify">Emerging applications like cloud computing and Big Data analytics have
  36. increased significantly the volume of traffic in data centers. However, the
  37. speed and energy efficiency improvements of typical general-purpose
  38. processors and memories used in servers has slowed down dramatically. Next
  39. generation servers will need more energy-efficient hardware as well as
  40. software ecosystems to sustain the vast amount of data center traffic which
  41. is expected to grow even more with the advent of Internet-of-Things. This
  42. workshop aims to present the most recent work on next generation
  43. energy-efficient servers and foster the interaction between the
  44. universities, research centers and industry that work on this area.</p>
  45. <p align="justify">In particular we call for original papers on the domain of servers for
  46. cloud- and edge- computing, microservers based on embedded processors,
  47. micro-architectures for low-power, dependable and/or secure servers,
  48. hardware accelerators for servers, run-time systems, middleware and
  49. programming frameworks that are used to reduce the power consumption in the
  50. data centers and/or deal with potential faults induced by
  51. reliability/variability issues.</p>
  52. <h3>Topics include:</h3>
  53. <pre>
  54. - Energy-efficient servers
  55. - Edge servers
  56. - Hardware accelerators for servers/data centers
  57. - Hardware accelerators for machine learning, graphs and databases
  58. - Microarchitectures for low power server processors
  59. - Reconfigurable computing for customized servers
  60. - Application benchmarks on embedded-based servers
  61. - Low power server interconnects
  62. - Programming frameworks for energy efficient servers
  63. - Energy-efficient resource management
  64. - Run-time system software
  65. - Disaggregated and Rack-scale Computing
  66. - Server architectures/system software/testbeds for near-data computing
  67. </pre>
  68. <h3>Important dates</h3>
  69. <pre>
  70. November 4, 2016 (AoE): Paper Submission deadline
  71. December 2, 2016: Acceptance Notification
  72. January 13, 2017: Camera ready version of accepted papers
  73. January 23, 2017: Workshop
  74. </pre>
  75. <li data-content="cfp">
  76. <a href="resources/abstract-v1.pdf">Download CFP</a>
  77. </li>
  78. <li data-content="submission">
  79. <h3>Information for Authors:</h3>
  80. <p align="justify">Paper submission: Papers should be submitted electronically through the
  81. workshop website. Electronic paper submission requires a full paper, up to 6
  82. double-column ACM format pages (A4), including figures and references.
  83. Papers should be submitted in PDF format. Please use the following template
  84. when preparing your manuscript:
  85. <a href="http://www.acm.org/sigs/publications/proceedings-templates">ACM
  86. Template</a>
  87. </p>
  88. <p>Accepted papers will be invited for an extended version as book chapters in Elsevier Book.
  89. </p>
  90. <h3>Important dates</h3>
  91. <pre>
  92. November 4, 2016 (AoE): Paper Submission deadline
  93. December 2, 2016: Acceptance Notification
  94. January 13, 2017: Camera ready version of accepted papers
  95. January 23, 2017: Workshop
  96. </pre>
  97. </li>
  98. <li data-content="cr-submission">
  99. <p>Not yet released...</p>
  100. </li>
  101. <li data-content="finalprogram">
  102. <p>Final program not ready yet...</p>
  103. </li>
  104. <li data-content="contact">
  105. <h3>General Co-Chairs</h3>
  106. <pre>
  107. Christoforos Kachris, ICCS
  108. Kostas Katrinis, IBM
  109. </pre>
  110. <h3>Program Co-Chairs</h3>
  111. <pre>
  112. Dimitrios Soudris, NTUA
  113. Dionisios Pnevmatikatos, FORTH/TUC
  114. </pre>
  115. <h3>Web and Submission Chair</h3>
  116. <pre>
  117. Harry Sidiropoulos, NTUA, GR
  118. </pre>
  119. <h3>Program Committee</h3>
  120. <pre>
  121. Angelos Bilas, FORTH
  122. Michaela Blott, Xilinx
  123. Babak Falsafi, EPFL
  124. Georgi Gaydadjiev, Maxeler
  125. Boris Grot, University of Edinburgh
  126. Christoforos Kachris, ICCS
  127. George Karakonstantis, QUB
  128. Kostas Katrinis, IBM
  129. Dirk Koch, University of Manchester
  130. Mihai Teodor Lazarescu, Politecnico Di Torino
  131. Dimitrios S. Nikolopoulos, QUB
  132. Dimitrios Soudris, NTUA
  133. Dionisios Pnevmatikatos, FORTH/TUC
  134. Mario Porrmann, Bielefeld University
  135. </pre>
  136. <h3>For further information, inquiries, etc. Contact:</h3>
  137. <pre>
  138. <a href="mailto:harry@microlab.ntua.gr">Harry Sidiropoulos, NTUA, GR</a>
  139. </pre>
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