starpu_slu_lu_model_12.idgraf 8.9 KB

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  1. ##################
  2. # Performance Model Version
  3. 45
  4. ####################
  5. # COMBs
  6. # number of combinations
  7. 9
  8. ####################
  9. # COMB_8
  10. # number of types devices
  11. 1
  12. ####################
  13. # DEV_0
  14. # device type (CPU - 0, CUDA - 1, OPENCL - 2, MIC - 3)
  15. 0
  16. ####################
  17. # DEV_0
  18. # device id
  19. 0
  20. ####################
  21. # DEV_0
  22. # number of cores
  23. 1
  24. ##########
  25. # number of implementations
  26. 1
  27. #####
  28. # Model for cpu0_impl0 (Comb8)
  29. # number of entries
  30. 3
  31. # sumlnx sumlnx2 sumlny sumlnxlny alpha beta n minx maxx
  32. 0.000000e+00 0.000000e+00 0.000000e+00 0.000000e+00 nan nan 0 0 0
  33. # a b c
  34. nan nan nan
  35. # not multiple-regression-base
  36. 0
  37. # hash size flops mean (us) dev (us) sum sum2 n
  38. 2c1922b7 819200 0.000000e+00 2.469013e+03 5.595193e+01 2.765294e+05 6.831054e+08 112
  39. d39bff17 3276800 0.000000e+00 1.667528e+04 1.964808e+02 1.300672e+06 2.169208e+10 78
  40. ff82dda0 7372800 0.000000e+00 5.216745e+04 4.664151e+02 3.443052e+06 1.796296e+11 66
  41. ####################
  42. # COMB_5
  43. # number of types devices
  44. 1
  45. ####################
  46. # DEV_0
  47. # device type (CPU - 0, CUDA - 1, OPENCL - 2, MIC - 3)
  48. 1
  49. ####################
  50. # DEV_0
  51. # device id
  52. 1
  53. ####################
  54. # DEV_0
  55. # number of cores
  56. 1
  57. ##########
  58. # number of implementations
  59. 1
  60. #####
  61. # Model for cuda1_impl0 (Comb5)
  62. # number of entries
  63. 3
  64. # sumlnx sumlnx2 sumlny sumlnxlny alpha beta n minx maxx
  65. 0.000000e+00 0.000000e+00 0.000000e+00 0.000000e+00 nan nan 0 0 0
  66. # a b c
  67. nan nan nan
  68. # not multiple-regression-base
  69. 0
  70. # hash size flops mean (us) dev (us) sum sum2 n
  71. 2c1922b7 819200 0.000000e+00 7.490410e+02 1.344248e+02 7.415506e+04 5.733412e+07 99
  72. d39bff17 3276800 0.000000e+00 2.737524e+03 2.974057e+02 3.942034e+05 1.091878e+09 144
  73. ff82dda0 7372800 0.000000e+00 7.212728e+03 1.319942e+03 6.924219e+05 5.161506e+09 96
  74. ####################
  75. # COMB_6
  76. # number of types devices
  77. 1
  78. ####################
  79. # DEV_0
  80. # device type (CPU - 0, CUDA - 1, OPENCL - 2, MIC - 3)
  81. 1
  82. ####################
  83. # DEV_0
  84. # device id
  85. 3
  86. ####################
  87. # DEV_0
  88. # number of cores
  89. 1
  90. ##########
  91. # number of implementations
  92. 1
  93. #####
  94. # Model for cuda3_impl0 (Comb6)
  95. # number of entries
  96. 3
  97. # sumlnx sumlnx2 sumlny sumlnxlny alpha beta n minx maxx
  98. 0.000000e+00 0.000000e+00 0.000000e+00 0.000000e+00 nan nan 0 0 0
  99. # a b c
  100. nan nan nan
  101. # not multiple-regression-base
  102. 0
  103. # hash size flops mean (us) dev (us) sum sum2 n
  104. 2c1922b7 819200 0.000000e+00 7.688939e+02 1.457751e+02 6.843156e+04 5.450789e+07 89
  105. d39bff17 3276800 0.000000e+00 2.735563e+03 2.889694e+02 2.899697e+05 8.020820e+08 106
  106. ff82dda0 7372800 0.000000e+00 6.820126e+03 9.314994e+02 7.638542e+05 5.306763e+09 112
  107. ####################
  108. # COMB_2
  109. # number of types devices
  110. 1
  111. ####################
  112. # DEV_0
  113. # device type (CPU - 0, CUDA - 1, OPENCL - 2, MIC - 3)
  114. 1
  115. ####################
  116. # DEV_0
  117. # device id
  118. 5
  119. ####################
  120. # DEV_0
  121. # number of cores
  122. 1
  123. ##########
  124. # number of implementations
  125. 1
  126. #####
  127. # Model for cuda5_impl0 (Comb2)
  128. # number of entries
  129. 3
  130. # sumlnx sumlnx2 sumlny sumlnxlny alpha beta n minx maxx
  131. 0.000000e+00 0.000000e+00 0.000000e+00 0.000000e+00 nan nan 0 0 0
  132. # a b c
  133. nan nan nan
  134. # not multiple-regression-base
  135. 0
  136. # hash size flops mean (us) dev (us) sum sum2 n
  137. 2c1922b7 819200 0.000000e+00 7.150281e+02 1.235393e+02 6.363750e+04 4.686092e+07 89
  138. d39bff17 3276800 0.000000e+00 2.835249e+03 4.125186e+02 1.899617e+05 5.499903e+08 67
  139. ff82dda0 7372800 0.000000e+00 6.720945e+03 7.632032e+02 6.989783e+05 4.758372e+09 104
  140. ####################
  141. # COMB_4
  142. # number of types devices
  143. 1
  144. ####################
  145. # DEV_0
  146. # device type (CPU - 0, CUDA - 1, OPENCL - 2, MIC - 3)
  147. 1
  148. ####################
  149. # DEV_0
  150. # device id
  151. 7
  152. ####################
  153. # DEV_0
  154. # number of cores
  155. 1
  156. ##########
  157. # number of implementations
  158. 1
  159. #####
  160. # Model for cuda7_impl0 (Comb4)
  161. # number of entries
  162. 3
  163. # sumlnx sumlnx2 sumlny sumlnxlny alpha beta n minx maxx
  164. 0.000000e+00 0.000000e+00 0.000000e+00 0.000000e+00 nan nan 0 0 0
  165. # a b c
  166. nan nan nan
  167. # not multiple-regression-base
  168. 0
  169. # hash size flops mean (us) dev (us) sum sum2 n
  170. 2c1922b7 819200 0.000000e+00 7.190609e+02 1.144317e+02 7.406327e+04 5.460474e+07 103
  171. d39bff17 3276800 0.000000e+00 2.867186e+03 4.168496e+02 2.838514e+05 8.310575e+08 99
  172. ff82dda0 7372800 0.000000e+00 6.809425e+03 9.031920e+02 6.400859e+05 4.435298e+09 94
  173. ####################
  174. # COMB_0
  175. # number of types devices
  176. 1
  177. ####################
  178. # DEV_0
  179. # device type (CPU - 0, CUDA - 1, OPENCL - 2, MIC - 3)
  180. 1
  181. ####################
  182. # DEV_0
  183. # device id
  184. 4
  185. ####################
  186. # DEV_0
  187. # number of cores
  188. 1
  189. ##########
  190. # number of implementations
  191. 1
  192. #####
  193. # Model for cuda4_impl0 (Comb0)
  194. # number of entries
  195. 3
  196. # sumlnx sumlnx2 sumlny sumlnxlny alpha beta n minx maxx
  197. 0.000000e+00 0.000000e+00 0.000000e+00 0.000000e+00 nan nan 0 0 0
  198. # a b c
  199. nan nan nan
  200. # not multiple-regression-base
  201. 0
  202. # hash size flops mean (us) dev (us) sum sum2 n
  203. 2c1922b7 819200 0.000000e+00 7.136273e+02 1.258701e+02 7.350362e+04 5.408605e+07 103
  204. d39bff17 3276800 0.000000e+00 2.942246e+03 4.585544e+02 1.706502e+05 5.142907e+08 58
  205. ff82dda0 7372800 0.000000e+00 6.744194e+03 8.416374e+02 5.597681e+05 3.833978e+09 83
  206. ####################
  207. # COMB_7
  208. # number of types devices
  209. 1
  210. ####################
  211. # DEV_0
  212. # device type (CPU - 0, CUDA - 1, OPENCL - 2, MIC - 3)
  213. 1
  214. ####################
  215. # DEV_0
  216. # device id
  217. 2
  218. ####################
  219. # DEV_0
  220. # number of cores
  221. 1
  222. ##########
  223. # number of implementations
  224. 1
  225. #####
  226. # Model for cuda2_impl0 (Comb7)
  227. # number of entries
  228. 3
  229. # sumlnx sumlnx2 sumlny sumlnxlny alpha beta n minx maxx
  230. 0.000000e+00 0.000000e+00 0.000000e+00 0.000000e+00 nan nan 0 0 0
  231. # a b c
  232. nan nan nan
  233. # not multiple-regression-base
  234. 0
  235. # hash size flops mean (us) dev (us) sum sum2 n
  236. 2c1922b7 819200 0.000000e+00 7.204798e+02 9.746533e+01 1.080720e+05 7.928859e+07 150
  237. d39bff17 3276800 0.000000e+00 2.539831e+03 4.296517e+02 3.885942e+05 1.015208e+09 153
  238. ff82dda0 7372800 0.000000e+00 7.293979e+03 1.385713e+03 6.929280e+05 5.236621e+09 95
  239. ####################
  240. # COMB_1
  241. # number of types devices
  242. 1
  243. ####################
  244. # DEV_0
  245. # device type (CPU - 0, CUDA - 1, OPENCL - 2, MIC - 3)
  246. 1
  247. ####################
  248. # DEV_0
  249. # device id
  250. 6
  251. ####################
  252. # DEV_0
  253. # number of cores
  254. 1
  255. ##########
  256. # number of implementations
  257. 1
  258. #####
  259. # Model for cuda6_impl0 (Comb1)
  260. # number of entries
  261. 3
  262. # sumlnx sumlnx2 sumlny sumlnxlny alpha beta n minx maxx
  263. 0.000000e+00 0.000000e+00 0.000000e+00 0.000000e+00 nan nan 0 0 0
  264. # a b c
  265. nan nan nan
  266. # not multiple-regression-base
  267. 0
  268. # hash size flops mean (us) dev (us) sum sum2 n
  269. 2c1922b7 819200 0.000000e+00 7.460951e+02 1.203288e+02 7.386342e+04 5.654256e+07 99
  270. d39bff17 3276800 0.000000e+00 2.972783e+03 5.066224e+02 2.259315e+05 6.911522e+08 76
  271. ff82dda0 7372800 0.000000e+00 6.643349e+03 8.230064e+02 6.510482e+05 4.391520e+09 98
  272. ####################
  273. # COMB_3
  274. # number of types devices
  275. 1
  276. ####################
  277. # DEV_0
  278. # device type (CPU - 0, CUDA - 1, OPENCL - 2, MIC - 3)
  279. 1
  280. ####################
  281. # DEV_0
  282. # device id
  283. 0
  284. ####################
  285. # DEV_0
  286. # number of cores
  287. 1
  288. ##########
  289. # number of implementations
  290. 1
  291. #####
  292. # Model for cuda0_impl0 (Comb3)
  293. # number of entries
  294. 3
  295. # sumlnx sumlnx2 sumlny sumlnxlny alpha beta n minx maxx
  296. 0.000000e+00 0.000000e+00 0.000000e+00 0.000000e+00 nan nan 0 0 0
  297. # a b c
  298. nan nan nan
  299. # not multiple-regression-base
  300. 0
  301. # hash size flops mean (us) dev (us) sum sum2 n
  302. 2c1922b7 819200 0.000000e+00 7.518059e+02 1.406096e+02 8.495406e+04 6.610309e+07 113
  303. d39bff17 3276800 0.000000e+00 2.794983e+03 3.357608e+02 4.164524e+05 1.180775e+09 149
  304. ff82dda0 7372800 0.000000e+00 6.735838e+03 7.525487e+02 6.803197e+05 4.639723e+09 101