starpu_slu_lu_model_11.sirocco 5.5 KB

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  1. ##################
  2. # Performance Model Version
  3. 45
  4. ####################
  5. # COMBs
  6. # number of combinations
  7. 5
  8. ####################
  9. # COMB_4
  10. # number of types devices
  11. 1
  12. ####################
  13. # DEV_0
  14. # device type (CPU - 0, CUDA - 1, OPENCL - 2, MIC - 3)
  15. 0
  16. ####################
  17. # DEV_0
  18. # device id
  19. 0
  20. ####################
  21. # DEV_0
  22. # number of cores
  23. 1
  24. ##########
  25. # number of implementations
  26. 1
  27. #####
  28. # Model for cpu0_impl0 (Comb4)
  29. # number of entries
  30. 4
  31. # sumlnx sumlnx2 sumlny sumlnxlny alpha beta n minx maxx
  32. 0.000000e+00 0.000000e+00 0.000000e+00 0.000000e+00 nan nan 0 0 0
  33. # a b c
  34. nan nan nan
  35. # not multiple-regression-base
  36. 0
  37. # hash size flops mean (us) dev (us) sum sum2 n
  38. 25ebb669 8294400 0.000000e+00 4.111343e+05 7.639666e+04 4.111343e+06 1.748679e+12 10
  39. afdd228b 1638400 0.000000e+00 2.923093e+04 1.278718e+03 5.553877e+05 1.626557e+10 19
  40. cea37d6d 409600 0.000000e+00 4.037068e+03 3.335771e+02 2.906689e+05 1.181462e+09 72
  41. 617e5fe6 3686400 0.000000e+00 1.029624e+05 6.177928e+03 1.029624e+06 1.063943e+11 10
  42. ####################
  43. # COMB_3
  44. # number of types devices
  45. 1
  46. ####################
  47. # DEV_0
  48. # device type (CPU - 0, CUDA - 1, OPENCL - 2, MIC - 3)
  49. 1
  50. ####################
  51. # DEV_0
  52. # device id
  53. 3
  54. ####################
  55. # DEV_0
  56. # number of cores
  57. 1
  58. ##########
  59. # number of implementations
  60. 1
  61. #####
  62. # Model for cuda3_impl0 (Comb3)
  63. # number of entries
  64. 4
  65. # sumlnx sumlnx2 sumlny sumlnxlny alpha beta n minx maxx
  66. 0.000000e+00 0.000000e+00 0.000000e+00 0.000000e+00 nan nan 0 0 0
  67. # a b c
  68. nan nan nan
  69. # not multiple-regression-base
  70. 0
  71. # hash size flops mean (us) dev (us) sum sum2 n
  72. cea37d6d 409600 0.000000e+00 9.866251e+03 7.665217e+02 9.866251e+04 9.793047e+08 10
  73. afdd228b 1638400 0.000000e+00 2.088164e+04 1.502169e+03 4.176328e+05 8.765989e+09 20
  74. 617e5fe6 3686400 0.000000e+00 4.153583e+04 9.473225e+02 9.968599e+05 4.142694e+10 24
  75. 25ebb669 8294400 0.000000e+00 9.378398e+04 2.901838e+03 1.594328e+06 1.496655e+11 17
  76. ####################
  77. # COMB_2
  78. # number of types devices
  79. 1
  80. ####################
  81. # DEV_0
  82. # device type (CPU - 0, CUDA - 1, OPENCL - 2, MIC - 3)
  83. 1
  84. ####################
  85. # DEV_0
  86. # device id
  87. 1
  88. ####################
  89. # DEV_0
  90. # number of cores
  91. 1
  92. ##########
  93. # number of implementations
  94. 1
  95. #####
  96. # Model for cuda1_impl0 (Comb2)
  97. # number of entries
  98. 4
  99. # sumlnx sumlnx2 sumlny sumlnxlny alpha beta n minx maxx
  100. 0.000000e+00 0.000000e+00 0.000000e+00 0.000000e+00 nan nan 0 0 0
  101. # a b c
  102. nan nan nan
  103. # not multiple-regression-base
  104. 0
  105. # hash size flops mean (us) dev (us) sum sum2 n
  106. 25ebb669 8294400 0.000000e+00 9.434448e+04 6.197321e+03 2.075578e+06 1.966643e+11 22
  107. afdd228b 1638400 0.000000e+00 2.242688e+04 2.707726e+03 3.139763e+05 7.144153e+09 14
  108. cea37d6d 409600 0.000000e+00 9.238189e+03 1.713378e+02 9.238189e+04 8.537349e+08 10
  109. 617e5fe6 3686400 0.000000e+00 4.357190e+04 5.271768e+03 7.842942e+05 3.467343e+10 18
  110. ####################
  111. # COMB_1
  112. # number of types devices
  113. 1
  114. ####################
  115. # DEV_0
  116. # device type (CPU - 0, CUDA - 1, OPENCL - 2, MIC - 3)
  117. 1
  118. ####################
  119. # DEV_0
  120. # device id
  121. 0
  122. ####################
  123. # DEV_0
  124. # number of cores
  125. 1
  126. ##########
  127. # number of implementations
  128. 1
  129. #####
  130. # Model for cuda0_impl0 (Comb1)
  131. # number of entries
  132. 4
  133. # sumlnx sumlnx2 sumlny sumlnxlny alpha beta n minx maxx
  134. 0.000000e+00 0.000000e+00 0.000000e+00 0.000000e+00 nan nan 0 0 0
  135. # a b c
  136. nan nan nan
  137. # not multiple-regression-base
  138. 0
  139. # hash size flops mean (us) dev (us) sum sum2 n
  140. 25ebb669 8294400 0.000000e+00 9.395404e+04 4.337001e+03 1.973035e+06 1.857696e+11 21
  141. afdd228b 1638400 0.000000e+00 2.096495e+04 7.732458e+02 3.773690e+05 7.922284e+09 18
  142. cea37d6d 409600 0.000000e+00 9.471831e+03 5.475075e+02 9.471831e+04 9.001535e+08 10
  143. 617e5fe6 3686400 0.000000e+00 4.647825e+04 9.283373e+03 5.577390e+05 2.695691e+10 12
  144. ####################
  145. # COMB_0
  146. # number of types devices
  147. 1
  148. ####################
  149. # DEV_0
  150. # device type (CPU - 0, CUDA - 1, OPENCL - 2, MIC - 3)
  151. 1
  152. ####################
  153. # DEV_0
  154. # device id
  155. 2
  156. ####################
  157. # DEV_0
  158. # number of cores
  159. 1
  160. ##########
  161. # number of implementations
  162. 1
  163. #####
  164. # Model for cuda2_impl0 (Comb0)
  165. # number of entries
  166. 4
  167. # sumlnx sumlnx2 sumlny sumlnxlny alpha beta n minx maxx
  168. 0.000000e+00 0.000000e+00 0.000000e+00 0.000000e+00 nan nan 0 0 0
  169. # a b c
  170. nan nan nan
  171. # not multiple-regression-base
  172. 0
  173. # hash size flops mean (us) dev (us) sum sum2 n
  174. 25ebb669 8294400 0.000000e+00 9.896522e+04 1.438963e+04 1.187583e+06 1.200141e+11 12
  175. afdd228b 1638400 0.000000e+00 2.172039e+04 1.567348e+03 2.823650e+05 6.165013e+09 13
  176. cea37d6d 409600 0.000000e+00 9.338877e+03 3.249828e+02 9.338877e+04 8.732025e+08 10
  177. 617e5fe6 3686400 0.000000e+00 4.258012e+04 2.921691e+03 8.090223e+05 3.461046e+10 19