save_cl_top.idgraf 8.9 KB

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  1. ##################
  2. # Performance Model Version
  3. 45
  4. ####################
  5. # COMBs
  6. # number of combinations
  7. 9
  8. ####################
  9. # COMB_0
  10. # number of types devices
  11. 1
  12. ####################
  13. # DEV_0
  14. # device type (CPU - 0, CUDA - 1, OPENCL - 2, MIC - 3)
  15. 0
  16. ####################
  17. # DEV_0
  18. # device id
  19. 0
  20. ####################
  21. # DEV_0
  22. # number of cores
  23. 1
  24. ##########
  25. # number of implementations
  26. 1
  27. #####
  28. # Model for cpu0_impl0 (Comb0)
  29. # number of entries
  30. 3
  31. # sumlnx sumlnx2 sumlny sumlnxlny alpha beta n minx maxx
  32. 0.000000e+00 0.000000e+00 0.000000e+00 0.000000e+00 nan nan 0 0 0
  33. # a b c
  34. nan nan nan
  35. # not multiple-regression-base
  36. 0
  37. # hash size flops mean (us) dev (us) sum sum2 n
  38. 4af260f6 14678040 0.000000e+00 3.246622e+01 6.891153e+00 3.928413e+03 1.332868e+05 121
  39. fb4b8624 4427800 0.000000e+00 1.139753e+01 2.243693e+00 2.644226e+03 3.130556e+04 232
  40. f2ff9ae5 34480152 0.000000e+00 5.591168e+01 1.328211e+01 1.241239e+04 7.331618e+05 222
  41. ####################
  42. # COMB_1
  43. # number of types devices
  44. 1
  45. ####################
  46. # DEV_0
  47. # device type (CPU - 0, CUDA - 1, OPENCL - 2, MIC - 3)
  48. 1
  49. ####################
  50. # DEV_0
  51. # device id
  52. 4
  53. ####################
  54. # DEV_0
  55. # number of cores
  56. 1
  57. ##########
  58. # number of implementations
  59. 1
  60. #####
  61. # Model for cuda4_impl0 (Comb1)
  62. # number of entries
  63. 3
  64. # sumlnx sumlnx2 sumlny sumlnxlny alpha beta n minx maxx
  65. 0.000000e+00 0.000000e+00 0.000000e+00 0.000000e+00 nan nan 0 0 0
  66. # a b c
  67. nan nan nan
  68. # not multiple-regression-base
  69. 0
  70. # hash size flops mean (us) dev (us) sum sum2 n
  71. 4af260f6 14678040 0.000000e+00 2.604823e+01 3.286196e+00 1.130493e+04 2.991603e+05 434
  72. fb4b8624 4427800 0.000000e+00 2.652276e+01 4.354433e+00 7.850738e+03 2.138358e+05 296
  73. f2ff9ae5 34480152 0.000000e+00 2.714414e+01 3.836601e+00 1.555359e+04 4.306232e+05 573
  74. ####################
  75. # COMB_2
  76. # number of types devices
  77. 1
  78. ####################
  79. # DEV_0
  80. # device type (CPU - 0, CUDA - 1, OPENCL - 2, MIC - 3)
  81. 1
  82. ####################
  83. # DEV_0
  84. # device id
  85. 1
  86. ####################
  87. # DEV_0
  88. # number of cores
  89. 1
  90. ##########
  91. # number of implementations
  92. 1
  93. #####
  94. # Model for cuda1_impl0 (Comb2)
  95. # number of entries
  96. 3
  97. # sumlnx sumlnx2 sumlny sumlnxlny alpha beta n minx maxx
  98. 0.000000e+00 0.000000e+00 0.000000e+00 0.000000e+00 nan nan 0 0 0
  99. # a b c
  100. nan nan nan
  101. # not multiple-regression-base
  102. 0
  103. # hash size flops mean (us) dev (us) sum sum2 n
  104. 4af260f6 14678040 0.000000e+00 2.599288e+01 3.808778e+00 1.115095e+04 2.960687e+05 429
  105. fb4b8624 4427800 0.000000e+00 2.539365e+01 2.861737e+00 6.678529e+03 1.717461e+05 263
  106. f2ff9ae5 34480152 0.000000e+00 2.629746e+01 2.517281e+00 1.159718e+04 3.077710e+05 441
  107. ####################
  108. # COMB_3
  109. # number of types devices
  110. 1
  111. ####################
  112. # DEV_0
  113. # device type (CPU - 0, CUDA - 1, OPENCL - 2, MIC - 3)
  114. 1
  115. ####################
  116. # DEV_0
  117. # device id
  118. 2
  119. ####################
  120. # DEV_0
  121. # number of cores
  122. 1
  123. ##########
  124. # number of implementations
  125. 1
  126. #####
  127. # Model for cuda2_impl0 (Comb3)
  128. # number of entries
  129. 3
  130. # sumlnx sumlnx2 sumlny sumlnxlny alpha beta n minx maxx
  131. 0.000000e+00 0.000000e+00 0.000000e+00 0.000000e+00 nan nan 0 0 0
  132. # a b c
  133. nan nan nan
  134. # not multiple-regression-base
  135. 0
  136. # hash size flops mean (us) dev (us) sum sum2 n
  137. 4af260f6 14678040 0.000000e+00 2.561750e+01 2.633232e+00 1.155349e+04 2.990988e+05 451
  138. fb4b8624 4427800 0.000000e+00 2.673210e+01 4.378492e+00 1.031859e+04 2.832378e+05 386
  139. f2ff9ae5 34480152 0.000000e+00 2.631930e+01 2.903449e+00 1.339652e+04 3.568781e+05 509
  140. ####################
  141. # COMB_4
  142. # number of types devices
  143. 1
  144. ####################
  145. # DEV_0
  146. # device type (CPU - 0, CUDA - 1, OPENCL - 2, MIC - 3)
  147. 1
  148. ####################
  149. # DEV_0
  150. # device id
  151. 6
  152. ####################
  153. # DEV_0
  154. # number of cores
  155. 1
  156. ##########
  157. # number of implementations
  158. 1
  159. #####
  160. # Model for cuda6_impl0 (Comb4)
  161. # number of entries
  162. 3
  163. # sumlnx sumlnx2 sumlny sumlnxlny alpha beta n minx maxx
  164. 0.000000e+00 0.000000e+00 0.000000e+00 0.000000e+00 nan nan 0 0 0
  165. # a b c
  166. nan nan nan
  167. # not multiple-regression-base
  168. 0
  169. # hash size flops mean (us) dev (us) sum sum2 n
  170. 4af260f6 14678040 0.000000e+00 2.607685e+01 3.121182e+00 7.979517e+03 2.110617e+05 306
  171. fb4b8624 4427800 0.000000e+00 2.621449e+01 3.800716e+00 7.654632e+03 2.048804e+05 292
  172. f2ff9ae5 34480152 0.000000e+00 2.661811e+01 2.706929e+00 1.810031e+04 4.867788e+05 680
  173. ####################
  174. # COMB_5
  175. # number of types devices
  176. 1
  177. ####################
  178. # DEV_0
  179. # device type (CPU - 0, CUDA - 1, OPENCL - 2, MIC - 3)
  180. 1
  181. ####################
  182. # DEV_0
  183. # device id
  184. 0
  185. ####################
  186. # DEV_0
  187. # number of cores
  188. 1
  189. ##########
  190. # number of implementations
  191. 1
  192. #####
  193. # Model for cuda0_impl0 (Comb5)
  194. # number of entries
  195. 3
  196. # sumlnx sumlnx2 sumlny sumlnxlny alpha beta n minx maxx
  197. 0.000000e+00 0.000000e+00 0.000000e+00 0.000000e+00 nan nan 0 0 0
  198. # a b c
  199. nan nan nan
  200. # not multiple-regression-base
  201. 0
  202. # hash size flops mean (us) dev (us) sum sum2 n
  203. 4af260f6 14678040 0.000000e+00 2.759081e+01 5.463486e+00 5.435390e+03 1.558472e+05 197
  204. fb4b8624 4427800 0.000000e+00 2.575898e+01 3.723342e+00 7.779212e+03 2.045713e+05 302
  205. f2ff9ae5 34480152 0.000000e+00 2.684177e+01 3.098778e+00 1.181038e+04 3.212366e+05 440
  206. ####################
  207. # COMB_6
  208. # number of types devices
  209. 1
  210. ####################
  211. # DEV_0
  212. # device type (CPU - 0, CUDA - 1, OPENCL - 2, MIC - 3)
  213. 1
  214. ####################
  215. # DEV_0
  216. # device id
  217. 3
  218. ####################
  219. # DEV_0
  220. # number of cores
  221. 1
  222. ##########
  223. # number of implementations
  224. 1
  225. #####
  226. # Model for cuda3_impl0 (Comb6)
  227. # number of entries
  228. 3
  229. # sumlnx sumlnx2 sumlny sumlnxlny alpha beta n minx maxx
  230. 0.000000e+00 0.000000e+00 0.000000e+00 0.000000e+00 nan nan 0 0 0
  231. # a b c
  232. nan nan nan
  233. # not multiple-regression-base
  234. 0
  235. # hash size flops mean (us) dev (us) sum sum2 n
  236. 4af260f6 14678040 0.000000e+00 2.613306e+01 2.901462e+00 1.100202e+04 2.910606e+05 421
  237. fb4b8624 4427800 0.000000e+00 2.615768e+01 3.461177e+00 7.010257e+03 1.865826e+05 268
  238. f2ff9ae5 34480152 0.000000e+00 2.749333e+01 3.923485e+00 1.492888e+04 4.188033e+05 543
  239. ####################
  240. # COMB_7
  241. # number of types devices
  242. 1
  243. ####################
  244. # DEV_0
  245. # device type (CPU - 0, CUDA - 1, OPENCL - 2, MIC - 3)
  246. 1
  247. ####################
  248. # DEV_0
  249. # device id
  250. 5
  251. ####################
  252. # DEV_0
  253. # number of cores
  254. 1
  255. ##########
  256. # number of implementations
  257. 1
  258. #####
  259. # Model for cuda5_impl0 (Comb7)
  260. # number of entries
  261. 3
  262. # sumlnx sumlnx2 sumlny sumlnxlny alpha beta n minx maxx
  263. 0.000000e+00 0.000000e+00 0.000000e+00 0.000000e+00 nan nan 0 0 0
  264. # a b c
  265. nan nan nan
  266. # not multiple-regression-base
  267. 0
  268. # hash size flops mean (us) dev (us) sum sum2 n
  269. 4af260f6 14678040 0.000000e+00 2.628755e+01 3.829892e+00 1.025215e+04 2.752243e+05 390
  270. fb4b8624 4427800 0.000000e+00 2.540957e+01 3.333356e+00 8.258109e+03 2.134461e+05 325
  271. f2ff9ae5 34480152 0.000000e+00 2.728087e+01 3.903560e+00 1.404965e+04 3.911340e+05 515
  272. ####################
  273. # COMB_8
  274. # number of types devices
  275. 1
  276. ####################
  277. # DEV_0
  278. # device type (CPU - 0, CUDA - 1, OPENCL - 2, MIC - 3)
  279. 1
  280. ####################
  281. # DEV_0
  282. # device id
  283. 7
  284. ####################
  285. # DEV_0
  286. # number of cores
  287. 1
  288. ##########
  289. # number of implementations
  290. 1
  291. #####
  292. # Model for cuda7_impl0 (Comb8)
  293. # number of entries
  294. 3
  295. # sumlnx sumlnx2 sumlny sumlnxlny alpha beta n minx maxx
  296. 0.000000e+00 0.000000e+00 0.000000e+00 0.000000e+00 nan nan 0 0 0
  297. # a b c
  298. nan nan nan
  299. # not multiple-regression-base
  300. 0
  301. # hash size flops mean (us) dev (us) sum sum2 n
  302. 4af260f6 14678040 0.000000e+00 2.705248e+01 4.049710e+00 1.163257e+04 3.217418e+05 430
  303. fb4b8624 4427800 0.000000e+00 2.626990e+01 3.774104e+00 6.908983e+03 1.852444e+05 263
  304. f2ff9ae5 34480152 0.000000e+00 2.670502e+01 3.597311e+00 1.303205e+04 3.543362e+05 488