save_cl_bottom.idgraf 8.9 KB

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  1. ##################
  2. # Performance Model Version
  3. 45
  4. ####################
  5. # COMBs
  6. # number of combinations
  7. 9
  8. ####################
  9. # COMB_0
  10. # number of types devices
  11. 1
  12. ####################
  13. # DEV_0
  14. # device type (CPU - 0, CUDA - 1, OPENCL - 2, MIC - 3)
  15. 0
  16. ####################
  17. # DEV_0
  18. # device id
  19. 0
  20. ####################
  21. # DEV_0
  22. # number of cores
  23. 1
  24. ##########
  25. # number of implementations
  26. 1
  27. #####
  28. # Model for cpu0_impl0 (Comb0)
  29. # number of entries
  30. 3
  31. # sumlnx sumlnx2 sumlny sumlnxlny alpha beta n minx maxx
  32. 0.000000e+00 0.000000e+00 0.000000e+00 0.000000e+00 nan nan 0 0 0
  33. # a b c
  34. nan nan nan
  35. # not multiple-regression-base
  36. 0
  37. # hash size flops mean (us) dev (us) sum sum2 n
  38. 4af260f6 14678040 0.000000e+00 2.985465e+01 6.158621e+00 3.552703e+03 1.105782e+05 119
  39. fb4b8624 4427800 0.000000e+00 1.132689e+01 2.249702e+00 2.423954e+03 2.853894e+04 214
  40. f2ff9ae5 34480152 0.000000e+00 5.622304e+01 1.121739e+01 9.276802e+03 5.423319e+05 165
  41. ####################
  42. # COMB_2
  43. # number of types devices
  44. 1
  45. ####################
  46. # DEV_0
  47. # device type (CPU - 0, CUDA - 1, OPENCL - 2, MIC - 3)
  48. 1
  49. ####################
  50. # DEV_0
  51. # device id
  52. 1
  53. ####################
  54. # DEV_0
  55. # number of cores
  56. 1
  57. ##########
  58. # number of implementations
  59. 1
  60. #####
  61. # Model for cuda1_impl0 (Comb2)
  62. # number of entries
  63. 3
  64. # sumlnx sumlnx2 sumlny sumlnxlny alpha beta n minx maxx
  65. 0.000000e+00 0.000000e+00 0.000000e+00 0.000000e+00 nan nan 0 0 0
  66. # a b c
  67. nan nan nan
  68. # not multiple-regression-base
  69. 0
  70. # hash size flops mean (us) dev (us) sum sum2 n
  71. 4af260f6 14678040 0.000000e+00 2.632587e+01 4.244468e+00 1.174134e+04 3.171360e+05 446
  72. fb4b8624 4427800 0.000000e+00 2.560067e+01 2.946464e+00 6.809779e+03 1.766442e+05 266
  73. f2ff9ae5 34480152 0.000000e+00 2.687395e+01 3.041318e+00 1.378634e+04 3.752385e+05 513
  74. ####################
  75. # COMB_6
  76. # number of types devices
  77. 1
  78. ####################
  79. # DEV_0
  80. # device type (CPU - 0, CUDA - 1, OPENCL - 2, MIC - 3)
  81. 1
  82. ####################
  83. # DEV_0
  84. # device id
  85. 3
  86. ####################
  87. # DEV_0
  88. # number of cores
  89. 1
  90. ##########
  91. # number of implementations
  92. 1
  93. #####
  94. # Model for cuda3_impl0 (Comb6)
  95. # number of entries
  96. 3
  97. # sumlnx sumlnx2 sumlny sumlnxlny alpha beta n minx maxx
  98. 0.000000e+00 0.000000e+00 0.000000e+00 0.000000e+00 nan nan 0 0 0
  99. # a b c
  100. nan nan nan
  101. # not multiple-regression-base
  102. 0
  103. # hash size flops mean (us) dev (us) sum sum2 n
  104. 4af260f6 14678040 0.000000e+00 2.682825e+01 3.688517e+00 9.309402e+03 2.544759e+05 347
  105. fb4b8624 4427800 0.000000e+00 2.601287e+01 3.034296e+00 6.711320e+03 1.769561e+05 258
  106. f2ff9ae5 34480152 0.000000e+00 2.650277e+01 3.250317e+00 1.327789e+04 3.571937e+05 501
  107. ####################
  108. # COMB_5
  109. # number of types devices
  110. 1
  111. ####################
  112. # DEV_0
  113. # device type (CPU - 0, CUDA - 1, OPENCL - 2, MIC - 3)
  114. 1
  115. ####################
  116. # DEV_0
  117. # device id
  118. 0
  119. ####################
  120. # DEV_0
  121. # number of cores
  122. 1
  123. ##########
  124. # number of implementations
  125. 1
  126. #####
  127. # Model for cuda0_impl0 (Comb5)
  128. # number of entries
  129. 3
  130. # sumlnx sumlnx2 sumlny sumlnxlny alpha beta n minx maxx
  131. 0.000000e+00 0.000000e+00 0.000000e+00 0.000000e+00 nan nan 0 0 0
  132. # a b c
  133. nan nan nan
  134. # not multiple-regression-base
  135. 0
  136. # hash size flops mean (us) dev (us) sum sum2 n
  137. 4af260f6 14678040 0.000000e+00 2.844841e+01 4.987346e+00 1.118023e+04 3.278350e+05 393
  138. fb4b8624 4427800 0.000000e+00 2.545228e+01 3.038424e+00 7.533874e+03 1.944869e+05 296
  139. f2ff9ae5 34480152 0.000000e+00 2.671593e+01 2.977811e+00 9.510870e+03 2.572485e+05 356
  140. ####################
  141. # COMB_7
  142. # number of types devices
  143. 1
  144. ####################
  145. # DEV_0
  146. # device type (CPU - 0, CUDA - 1, OPENCL - 2, MIC - 3)
  147. 1
  148. ####################
  149. # DEV_0
  150. # device id
  151. 5
  152. ####################
  153. # DEV_0
  154. # number of cores
  155. 1
  156. ##########
  157. # number of implementations
  158. 1
  159. #####
  160. # Model for cuda5_impl0 (Comb7)
  161. # number of entries
  162. 3
  163. # sumlnx sumlnx2 sumlny sumlnxlny alpha beta n minx maxx
  164. 0.000000e+00 0.000000e+00 0.000000e+00 0.000000e+00 nan nan 0 0 0
  165. # a b c
  166. nan nan nan
  167. # not multiple-regression-base
  168. 0
  169. # hash size flops mean (us) dev (us) sum sum2 n
  170. 4af260f6 14678040 0.000000e+00 2.683154e+01 3.643920e+00 1.145707e+04 3.130806e+05 427
  171. fb4b8624 4427800 0.000000e+00 2.439165e+01 2.519213e+00 6.951620e+03 1.713702e+05 285
  172. f2ff9ae5 34480152 0.000000e+00 2.686670e+01 3.337051e+00 1.332588e+04 3.635460e+05 496
  173. ####################
  174. # COMB_8
  175. # number of types devices
  176. 1
  177. ####################
  178. # DEV_0
  179. # device type (CPU - 0, CUDA - 1, OPENCL - 2, MIC - 3)
  180. 1
  181. ####################
  182. # DEV_0
  183. # device id
  184. 7
  185. ####################
  186. # DEV_0
  187. # number of cores
  188. 1
  189. ##########
  190. # number of implementations
  191. 1
  192. #####
  193. # Model for cuda7_impl0 (Comb8)
  194. # number of entries
  195. 3
  196. # sumlnx sumlnx2 sumlny sumlnxlny alpha beta n minx maxx
  197. 0.000000e+00 0.000000e+00 0.000000e+00 0.000000e+00 nan nan 0 0 0
  198. # a b c
  199. nan nan nan
  200. # not multiple-regression-base
  201. 0
  202. # hash size flops mean (us) dev (us) sum sum2 n
  203. 4af260f6 14678040 0.000000e+00 2.743422e+01 5.313897e+00 8.504608e+03 2.420709e+05 310
  204. fb4b8624 4427800 0.000000e+00 2.591823e+01 3.009457e+00 7.879143e+03 2.069667e+05 304
  205. f2ff9ae5 34480152 0.000000e+00 2.671837e+01 2.963498e+00 1.282482e+04 3.468736e+05 480
  206. ####################
  207. # COMB_1
  208. # number of types devices
  209. 1
  210. ####################
  211. # DEV_0
  212. # device type (CPU - 0, CUDA - 1, OPENCL - 2, MIC - 3)
  213. 1
  214. ####################
  215. # DEV_0
  216. # device id
  217. 4
  218. ####################
  219. # DEV_0
  220. # number of cores
  221. 1
  222. ##########
  223. # number of implementations
  224. 1
  225. #####
  226. # Model for cuda4_impl0 (Comb1)
  227. # number of entries
  228. 3
  229. # sumlnx sumlnx2 sumlny sumlnxlny alpha beta n minx maxx
  230. 0.000000e+00 0.000000e+00 0.000000e+00 0.000000e+00 nan nan 0 0 0
  231. # a b c
  232. nan nan nan
  233. # not multiple-regression-base
  234. 0
  235. # hash size flops mean (us) dev (us) sum sum2 n
  236. 4af260f6 14678040 0.000000e+00 2.572873e+01 2.716127e+00 1.232406e+04 3.206163e+05 479
  237. fb4b8624 4427800 0.000000e+00 2.555023e+01 2.989409e+00 6.362008e+03 1.647760e+05 249
  238. f2ff9ae5 34480152 0.000000e+00 2.648407e+01 2.593556e+00 1.504295e+04 4.022192e+05 568
  239. ####################
  240. # COMB_4
  241. # number of types devices
  242. 1
  243. ####################
  244. # DEV_0
  245. # device type (CPU - 0, CUDA - 1, OPENCL - 2, MIC - 3)
  246. 1
  247. ####################
  248. # DEV_0
  249. # device id
  250. 6
  251. ####################
  252. # DEV_0
  253. # number of cores
  254. 1
  255. ##########
  256. # number of implementations
  257. 1
  258. #####
  259. # Model for cuda6_impl0 (Comb4)
  260. # number of entries
  261. 3
  262. # sumlnx sumlnx2 sumlny sumlnxlny alpha beta n minx maxx
  263. 0.000000e+00 0.000000e+00 0.000000e+00 0.000000e+00 nan nan 0 0 0
  264. # a b c
  265. nan nan nan
  266. # not multiple-regression-base
  267. 0
  268. # hash size flops mean (us) dev (us) sum sum2 n
  269. 4af260f6 14678040 0.000000e+00 2.535931e+01 2.801001e+00 7.303480e+03 1.874707e+05 288
  270. fb4b8624 4427800 0.000000e+00 2.706983e+01 4.764143e+00 1.228970e+04 3.429847e+05 454
  271. f2ff9ae5 34480152 0.000000e+00 2.645378e+01 3.704623e+00 1.251264e+04 3.374982e+05 473
  272. ####################
  273. # COMB_3
  274. # number of types devices
  275. 1
  276. ####################
  277. # DEV_0
  278. # device type (CPU - 0, CUDA - 1, OPENCL - 2, MIC - 3)
  279. 1
  280. ####################
  281. # DEV_0
  282. # device id
  283. 2
  284. ####################
  285. # DEV_0
  286. # number of cores
  287. 1
  288. ##########
  289. # number of implementations
  290. 1
  291. #####
  292. # Model for cuda2_impl0 (Comb3)
  293. # number of entries
  294. 3
  295. # sumlnx sumlnx2 sumlny sumlnxlny alpha beta n minx maxx
  296. 0.000000e+00 0.000000e+00 0.000000e+00 0.000000e+00 nan nan 0 0 0
  297. # a b c
  298. nan nan nan
  299. # not multiple-regression-base
  300. 0
  301. # hash size flops mean (us) dev (us) sum sum2 n
  302. 4af260f6 14678040 0.000000e+00 2.565071e+01 2.881053e+00 1.064505e+04 2.764977e+05 415
  303. fb4b8624 4427800 0.000000e+00 2.622930e+01 4.388391e+00 8.262230e+03 2.227788e+05 315
  304. f2ff9ae5 34480152 0.000000e+00 2.628917e+01 2.974884e+00 1.204044e+04 3.205863e+05 458