starpu_slu_lu_model_21.idgraf 8.9 KB

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  1. ##################
  2. # Performance Model Version
  3. 45
  4. ####################
  5. # COMBs
  6. # number of combinations
  7. 9
  8. ####################
  9. # COMB_8
  10. # number of types devices
  11. 1
  12. ####################
  13. # DEV_0
  14. # device type (CPU - 0, CUDA - 1, OPENCL - 2, MIC - 3)
  15. 0
  16. ####################
  17. # DEV_0
  18. # device id
  19. 0
  20. ####################
  21. # DEV_0
  22. # number of cores
  23. 1
  24. ##########
  25. # number of implementations
  26. 1
  27. #####
  28. # Model for cpu0_impl0 (Comb8)
  29. # number of entries
  30. 3
  31. # sumlnx sumlnx2 sumlny sumlnxlny alpha beta n minx maxx
  32. 0.000000e+00 0.000000e+00 0.000000e+00 0.000000e+00 nan nan 0 0 0
  33. # a b c
  34. nan nan nan
  35. # not multiple-regression-base
  36. 0
  37. # hash size flops mean (us) dev (us) sum sum2 n
  38. 2c1922b7 819200 0.000000e+00 1.946809e+03 8.216247e+01 4.049363e+05 7.897378e+08 208
  39. d39bff17 3276800 0.000000e+00 1.423970e+04 2.281585e+02 1.395491e+06 1.987647e+10 98
  40. ff82dda0 7372800 0.000000e+00 4.640991e+04 5.437505e+02 4.919451e+06 2.283426e+11 106
  41. ####################
  42. # COMB_0
  43. # number of types devices
  44. 1
  45. ####################
  46. # DEV_0
  47. # device type (CPU - 0, CUDA - 1, OPENCL - 2, MIC - 3)
  48. 1
  49. ####################
  50. # DEV_0
  51. # device id
  52. 4
  53. ####################
  54. # DEV_0
  55. # number of cores
  56. 1
  57. ##########
  58. # number of implementations
  59. 1
  60. #####
  61. # Model for cuda4_impl0 (Comb0)
  62. # number of entries
  63. 3
  64. # sumlnx sumlnx2 sumlny sumlnxlny alpha beta n minx maxx
  65. 0.000000e+00 0.000000e+00 0.000000e+00 0.000000e+00 nan nan 0 0 0
  66. # a b c
  67. nan nan nan
  68. # not multiple-regression-base
  69. 0
  70. # hash size flops mean (us) dev (us) sum sum2 n
  71. 2c1922b7 819200 0.000000e+00 4.484181e+02 9.807341e+01 3.004401e+04 1.411671e+07 67
  72. d39bff17 3276800 0.000000e+00 1.658665e+03 2.005859e+02 2.388477e+05 4.019622e+08 144
  73. ff82dda0 7372800 0.000000e+00 3.922083e+03 2.271290e+02 2.588575e+05 1.018665e+09 66
  74. ####################
  75. # COMB_3
  76. # number of types devices
  77. 1
  78. ####################
  79. # DEV_0
  80. # device type (CPU - 0, CUDA - 1, OPENCL - 2, MIC - 3)
  81. 1
  82. ####################
  83. # DEV_0
  84. # device id
  85. 0
  86. ####################
  87. # DEV_0
  88. # number of cores
  89. 1
  90. ##########
  91. # number of implementations
  92. 1
  93. #####
  94. # Model for cuda0_impl0 (Comb3)
  95. # number of entries
  96. 3
  97. # sumlnx sumlnx2 sumlny sumlnxlny alpha beta n minx maxx
  98. 0.000000e+00 0.000000e+00 0.000000e+00 0.000000e+00 nan nan 0 0 0
  99. # a b c
  100. nan nan nan
  101. # not multiple-regression-base
  102. 0
  103. # hash size flops mean (us) dev (us) sum sum2 n
  104. 2c1922b7 819200 0.000000e+00 5.042679e+02 1.229686e+02 7.362312e+04 3.933348e+07 146
  105. d39bff17 3276800 0.000000e+00 2.167031e+03 5.827483e+02 2.773800e+05 6.445595e+08 128
  106. ff82dda0 7372800 0.000000e+00 4.035358e+03 4.245106e+02 4.035358e+05 1.646433e+09 100
  107. ####################
  108. # COMB_1
  109. # number of types devices
  110. 1
  111. ####################
  112. # DEV_0
  113. # device type (CPU - 0, CUDA - 1, OPENCL - 2, MIC - 3)
  114. 1
  115. ####################
  116. # DEV_0
  117. # device id
  118. 6
  119. ####################
  120. # DEV_0
  121. # number of cores
  122. 1
  123. ##########
  124. # number of implementations
  125. 1
  126. #####
  127. # Model for cuda6_impl0 (Comb1)
  128. # number of entries
  129. 3
  130. # sumlnx sumlnx2 sumlny sumlnxlny alpha beta n minx maxx
  131. 0.000000e+00 0.000000e+00 0.000000e+00 0.000000e+00 nan nan 0 0 0
  132. # a b c
  133. nan nan nan
  134. # not multiple-regression-base
  135. 0
  136. # hash size flops mean (us) dev (us) sum sum2 n
  137. 2c1922b7 819200 0.000000e+00 4.873044e+02 1.174149e+02 2.631443e+04 1.356760e+07 54
  138. d39bff17 3276800 0.000000e+00 1.705876e+03 1.721886e+02 1.808228e+05 3.116041e+08 106
  139. ff82dda0 7372800 0.000000e+00 3.936492e+03 2.608005e+02 2.440625e+05 9.649671e+08 62
  140. ####################
  141. # COMB_7
  142. # number of types devices
  143. 1
  144. ####################
  145. # DEV_0
  146. # device type (CPU - 0, CUDA - 1, OPENCL - 2, MIC - 3)
  147. 1
  148. ####################
  149. # DEV_0
  150. # device id
  151. 2
  152. ####################
  153. # DEV_0
  154. # number of cores
  155. 1
  156. ##########
  157. # number of implementations
  158. 1
  159. #####
  160. # Model for cuda2_impl0 (Comb7)
  161. # number of entries
  162. 3
  163. # sumlnx sumlnx2 sumlny sumlnxlny alpha beta n minx maxx
  164. 0.000000e+00 0.000000e+00 0.000000e+00 0.000000e+00 nan nan 0 0 0
  165. # a b c
  166. nan nan nan
  167. # not multiple-regression-base
  168. 0
  169. # hash size flops mean (us) dev (us) sum sum2 n
  170. 2c1922b7 819200 0.000000e+00 5.272057e+02 1.307030e+02 5.535660e+04 3.097805e+07 105
  171. d39bff17 3276800 0.000000e+00 1.638590e+03 9.390080e+01 1.163399e+05 1.912593e+08 71
  172. ff82dda0 7372800 0.000000e+00 4.055643e+03 3.711103e+02 4.177313e+05 1.708355e+09 103
  173. ####################
  174. # COMB_2
  175. # number of types devices
  176. 1
  177. ####################
  178. # DEV_0
  179. # device type (CPU - 0, CUDA - 1, OPENCL - 2, MIC - 3)
  180. 1
  181. ####################
  182. # DEV_0
  183. # device id
  184. 5
  185. ####################
  186. # DEV_0
  187. # number of cores
  188. 1
  189. ##########
  190. # number of implementations
  191. 1
  192. #####
  193. # Model for cuda5_impl0 (Comb2)
  194. # number of entries
  195. 3
  196. # sumlnx sumlnx2 sumlny sumlnxlny alpha beta n minx maxx
  197. 0.000000e+00 0.000000e+00 0.000000e+00 0.000000e+00 nan nan 0 0 0
  198. # a b c
  199. nan nan nan
  200. # not multiple-regression-base
  201. 0
  202. # hash size flops mean (us) dev (us) sum sum2 n
  203. 2c1922b7 819200 0.000000e+00 4.303558e+02 7.490536e+01 2.840348e+04 1.259392e+07 66
  204. d39bff17 3276800 0.000000e+00 1.669452e+03 1.444951e+02 1.419035e+05 2.386758e+08 85
  205. ff82dda0 7372800 0.000000e+00 4.288060e+03 7.671104e+02 2.744359e+05 1.214459e+09 64
  206. ####################
  207. # COMB_5
  208. # number of types devices
  209. 1
  210. ####################
  211. # DEV_0
  212. # device type (CPU - 0, CUDA - 1, OPENCL - 2, MIC - 3)
  213. 1
  214. ####################
  215. # DEV_0
  216. # device id
  217. 1
  218. ####################
  219. # DEV_0
  220. # number of cores
  221. 1
  222. ##########
  223. # number of implementations
  224. 1
  225. #####
  226. # Model for cuda1_impl0 (Comb5)
  227. # number of entries
  228. 3
  229. # sumlnx sumlnx2 sumlny sumlnxlny alpha beta n minx maxx
  230. 0.000000e+00 0.000000e+00 0.000000e+00 0.000000e+00 nan nan 0 0 0
  231. # a b c
  232. nan nan nan
  233. # not multiple-regression-base
  234. 0
  235. # hash size flops mean (us) dev (us) sum sum2 n
  236. 2c1922b7 819200 0.000000e+00 4.394264e+02 8.387153e+01 6.283798e+04 2.861859e+07 143
  237. d39bff17 3276800 0.000000e+00 2.098818e+03 5.403136e+02 2.140795e+05 4.790917e+08 102
  238. ff82dda0 7372800 0.000000e+00 4.766912e+03 1.123433e+03 7.579390e+05 3.813703e+09 159
  239. ####################
  240. # COMB_6
  241. # number of types devices
  242. 1
  243. ####################
  244. # DEV_0
  245. # device type (CPU - 0, CUDA - 1, OPENCL - 2, MIC - 3)
  246. 1
  247. ####################
  248. # DEV_0
  249. # device id
  250. 3
  251. ####################
  252. # DEV_0
  253. # number of cores
  254. 1
  255. ##########
  256. # number of implementations
  257. 1
  258. #####
  259. # Model for cuda3_impl0 (Comb6)
  260. # number of entries
  261. 3
  262. # sumlnx sumlnx2 sumlny sumlnxlny alpha beta n minx maxx
  263. 0.000000e+00 0.000000e+00 0.000000e+00 0.000000e+00 nan nan 0 0 0
  264. # a b c
  265. nan nan nan
  266. # not multiple-regression-base
  267. 0
  268. # hash size flops mean (us) dev (us) sum sum2 n
  269. 2c1922b7 819200 0.000000e+00 4.660051e+02 1.021627e+02 6.477470e+04 3.163611e+07 139
  270. d39bff17 3276800 0.000000e+00 2.103985e+03 5.293854e+02 2.377503e+05 5.318912e+08 113
  271. ff82dda0 7372800 0.000000e+00 3.972257e+03 3.858968e+02 2.899747e+05 1.162725e+09 73
  272. ####################
  273. # COMB_4
  274. # number of types devices
  275. 1
  276. ####################
  277. # DEV_0
  278. # device type (CPU - 0, CUDA - 1, OPENCL - 2, MIC - 3)
  279. 1
  280. ####################
  281. # DEV_0
  282. # device id
  283. 7
  284. ####################
  285. # DEV_0
  286. # number of cores
  287. 1
  288. ##########
  289. # number of implementations
  290. 1
  291. #####
  292. # Model for cuda7_impl0 (Comb4)
  293. # number of entries
  294. 3
  295. # sumlnx sumlnx2 sumlny sumlnxlny alpha beta n minx maxx
  296. 0.000000e+00 0.000000e+00 0.000000e+00 0.000000e+00 nan nan 0 0 0
  297. # a b c
  298. nan nan nan
  299. # not multiple-regression-base
  300. 0
  301. # hash size flops mean (us) dev (us) sum sum2 n
  302. 2c1922b7 819200 0.000000e+00 5.222345e+02 1.241013e+02 2.715620e+04 1.498276e+07 52
  303. d39bff17 3276800 0.000000e+00 1.941135e+03 4.386059e+02 1.824667e+05 3.722759e+08 94
  304. ff82dda0 7372800 0.000000e+00 4.892155e+03 1.147723e+03 2.397156e+05 1.237272e+09 49