save_cl_top.sirocco 5.0 KB

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  1. ##################
  2. # Performance Model Version
  3. 45
  4. ####################
  5. # COMBs
  6. # number of combinations
  7. 5
  8. ####################
  9. # COMB_0
  10. # number of types devices
  11. 1
  12. ####################
  13. # DEV_0
  14. # device type (CPU - 0, CUDA - 1, OPENCL - 2, MIC - 3)
  15. 0
  16. ####################
  17. # DEV_0
  18. # device id
  19. 0
  20. ####################
  21. # DEV_0
  22. # number of cores
  23. 1
  24. ##########
  25. # number of implementations
  26. 1
  27. #####
  28. # Model for cpu0_impl0 (Comb0)
  29. # number of entries
  30. 3
  31. # sumlnx sumlnx2 sumlny sumlnxlny alpha beta n minx maxx
  32. 0.000000e+00 0.000000e+00 0.000000e+00 0.000000e+00 nan nan 0 0 0
  33. # a b c
  34. nan nan nan
  35. # not multiple-regression-base
  36. 0
  37. # hash size flops mean (us) dev (us) sum sum2 n
  38. 4af260f6 14678040 0.000000e+00 3.501046e+01 7.466097e+00 2.835847e+04 1.037995e+06 810
  39. fb4b8624 4427800 0.000000e+00 2.773216e+01 6.482940e+00 1.680846e+05 4.916085e+06 6061
  40. f2ff9ae5 34480152 0.000000e+00 5.337509e+01 1.160081e+01 6.591824e+04 3.684596e+06 1235
  41. ####################
  42. # COMB_1
  43. # number of types devices
  44. 1
  45. ####################
  46. # DEV_0
  47. # device type (CPU - 0, CUDA - 1, OPENCL - 2, MIC - 3)
  48. 1
  49. ####################
  50. # DEV_0
  51. # device id
  52. 3
  53. ####################
  54. # DEV_0
  55. # number of cores
  56. 1
  57. ##########
  58. # number of implementations
  59. 1
  60. #####
  61. # Model for cuda3_impl0 (Comb1)
  62. # number of entries
  63. 3
  64. # sumlnx sumlnx2 sumlny sumlnxlny alpha beta n minx maxx
  65. 0.000000e+00 0.000000e+00 0.000000e+00 0.000000e+00 nan nan 0 0 0
  66. # a b c
  67. nan nan nan
  68. # not multiple-regression-base
  69. 0
  70. # hash size flops mean (us) dev (us) sum sum2 n
  71. 4af260f6 14678040 0.000000e+00 3.362211e+01 7.569501e+00 1.795421e+04 6.342550e+05 534
  72. fb4b8624 4427800 0.000000e+00 3.231969e+01 5.862640e+00 1.877774e+04 6.268602e+05 581
  73. f2ff9ae5 34480152 0.000000e+00 3.995777e+01 9.699452e+00 3.180638e+04 1.345799e+06 796
  74. ####################
  75. # COMB_2
  76. # number of types devices
  77. 1
  78. ####################
  79. # DEV_0
  80. # device type (CPU - 0, CUDA - 1, OPENCL - 2, MIC - 3)
  81. 1
  82. ####################
  83. # DEV_0
  84. # device id
  85. 2
  86. ####################
  87. # DEV_0
  88. # number of cores
  89. 1
  90. ##########
  91. # number of implementations
  92. 1
  93. #####
  94. # Model for cuda2_impl0 (Comb2)
  95. # number of entries
  96. 3
  97. # sumlnx sumlnx2 sumlny sumlnxlny alpha beta n minx maxx
  98. 0.000000e+00 0.000000e+00 0.000000e+00 0.000000e+00 nan nan 0 0 0
  99. # a b c
  100. nan nan nan
  101. # not multiple-regression-base
  102. 0
  103. # hash size flops mean (us) dev (us) sum sum2 n
  104. 4af260f6 14678040 0.000000e+00 3.654429e+01 8.110997e+00 1.710273e+04 6.557958e+05 468
  105. fb4b8624 4427800 0.000000e+00 3.606370e+01 8.402269e+00 2.171034e+04 8.254553e+05 602
  106. f2ff9ae5 34480152 0.000000e+00 3.192218e+01 6.956874e+00 1.695068e+04 5.668019e+05 531
  107. ####################
  108. # COMB_3
  109. # number of types devices
  110. 1
  111. ####################
  112. # DEV_0
  113. # device type (CPU - 0, CUDA - 1, OPENCL - 2, MIC - 3)
  114. 1
  115. ####################
  116. # DEV_0
  117. # device id
  118. 1
  119. ####################
  120. # DEV_0
  121. # number of cores
  122. 1
  123. ##########
  124. # number of implementations
  125. 1
  126. #####
  127. # Model for cuda1_impl0 (Comb3)
  128. # number of entries
  129. 3
  130. # sumlnx sumlnx2 sumlny sumlnxlny alpha beta n minx maxx
  131. 0.000000e+00 0.000000e+00 0.000000e+00 0.000000e+00 nan nan 0 0 0
  132. # a b c
  133. nan nan nan
  134. # not multiple-regression-base
  135. 0
  136. # hash size flops mean (us) dev (us) sum sum2 n
  137. 4af260f6 14678040 0.000000e+00 3.551068e+01 7.784366e+00 1.278384e+04 4.757777e+05 360
  138. fb4b8624 4427800 0.000000e+00 3.460669e+01 7.284566e+00 1.996806e+04 7.216470e+05 577
  139. f2ff9ae5 34480152 0.000000e+00 3.547098e+01 8.430109e+00 2.805755e+04 1.051443e+06 791
  140. ####################
  141. # COMB_4
  142. # number of types devices
  143. 1
  144. ####################
  145. # DEV_0
  146. # device type (CPU - 0, CUDA - 1, OPENCL - 2, MIC - 3)
  147. 1
  148. ####################
  149. # DEV_0
  150. # device id
  151. 0
  152. ####################
  153. # DEV_0
  154. # number of cores
  155. 1
  156. ##########
  157. # number of implementations
  158. 1
  159. #####
  160. # Model for cuda0_impl0 (Comb4)
  161. # number of entries
  162. 3
  163. # sumlnx sumlnx2 sumlny sumlnxlny alpha beta n minx maxx
  164. 0.000000e+00 0.000000e+00 0.000000e+00 0.000000e+00 nan nan 0 0 0
  165. # a b c
  166. nan nan nan
  167. # not multiple-regression-base
  168. 0
  169. # hash size flops mean (us) dev (us) sum sum2 n
  170. 4af260f6 14678040 0.000000e+00 3.712899e+01 8.969310e+00 2.030956e+04 7.980787e+05 547
  171. fb4b8624 4427800 0.000000e+00 3.619911e+01 8.162351e+00 2.287784e+04 8.702638e+05 632
  172. f2ff9ae5 34480152 0.000000e+00 3.132201e+01 6.179930e+00 2.584066e+04 8.408892e+05 825