starpu_slu_lu_model_11.sirocco 5.4 KB

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  1. ##################
  2. # Performance Model Version
  3. 44
  4. ####################
  5. # COMBs
  6. # number of combinations
  7. 5
  8. ####################
  9. # COMB_4
  10. # number of types devices
  11. 1
  12. ####################
  13. # DEV_0
  14. # device type (CPU - 0, CUDA - 1, OPENCL - 2, MIC - 3, SCC - 4)
  15. 0
  16. ####################
  17. # DEV_0
  18. # device id
  19. 0
  20. ####################
  21. # DEV_0
  22. # number of cores
  23. 1
  24. ##########
  25. # number of implementations
  26. 1
  27. #####
  28. # Model for cpu0_impl0 (Comb4)
  29. # number of entries
  30. 4
  31. # sumlnx sumlnx2 sumlny sumlnxlny alpha beta n minx maxx
  32. 0.000000e+00 0.000000e+00 0.000000e+00 0.000000e+00 nan nan 0 0 0
  33. # a b c
  34. nan nan nan
  35. # hash size flops mean (us) dev (us) sum sum2 n
  36. 25ebb669 8294400 0.000000e+00 4.111343e+05 7.639666e+04 4.111343e+06 1.748679e+12 10
  37. afdd228b 1638400 0.000000e+00 2.923093e+04 1.278718e+03 5.553877e+05 1.626557e+10 19
  38. cea37d6d 409600 0.000000e+00 4.037068e+03 3.335771e+02 2.906689e+05 1.181462e+09 72
  39. 617e5fe6 3686400 0.000000e+00 1.029624e+05 6.177928e+03 1.029624e+06 1.063943e+11 10
  40. ####################
  41. # COMB_3
  42. # number of types devices
  43. 1
  44. ####################
  45. # DEV_0
  46. # device type (CPU - 0, CUDA - 1, OPENCL - 2, MIC - 3, SCC - 4)
  47. 1
  48. ####################
  49. # DEV_0
  50. # device id
  51. 3
  52. ####################
  53. # DEV_0
  54. # number of cores
  55. 1
  56. ##########
  57. # number of implementations
  58. 1
  59. #####
  60. # Model for cuda3_impl0 (Comb3)
  61. # number of entries
  62. 4
  63. # sumlnx sumlnx2 sumlny sumlnxlny alpha beta n minx maxx
  64. 0.000000e+00 0.000000e+00 0.000000e+00 0.000000e+00 nan nan 0 0 0
  65. # a b c
  66. nan nan nan
  67. # hash size flops mean (us) dev (us) sum sum2 n
  68. cea37d6d 409600 0.000000e+00 9.866251e+03 7.665217e+02 9.866251e+04 9.793047e+08 10
  69. afdd228b 1638400 0.000000e+00 2.088164e+04 1.502169e+03 4.176328e+05 8.765989e+09 20
  70. 617e5fe6 3686400 0.000000e+00 4.153583e+04 9.473225e+02 9.968599e+05 4.142694e+10 24
  71. 25ebb669 8294400 0.000000e+00 9.378398e+04 2.901838e+03 1.594328e+06 1.496655e+11 17
  72. ####################
  73. # COMB_2
  74. # number of types devices
  75. 1
  76. ####################
  77. # DEV_0
  78. # device type (CPU - 0, CUDA - 1, OPENCL - 2, MIC - 3, SCC - 4)
  79. 1
  80. ####################
  81. # DEV_0
  82. # device id
  83. 1
  84. ####################
  85. # DEV_0
  86. # number of cores
  87. 1
  88. ##########
  89. # number of implementations
  90. 1
  91. #####
  92. # Model for cuda1_impl0 (Comb2)
  93. # number of entries
  94. 4
  95. # sumlnx sumlnx2 sumlny sumlnxlny alpha beta n minx maxx
  96. 0.000000e+00 0.000000e+00 0.000000e+00 0.000000e+00 nan nan 0 0 0
  97. # a b c
  98. nan nan nan
  99. # hash size flops mean (us) dev (us) sum sum2 n
  100. 25ebb669 8294400 0.000000e+00 9.434448e+04 6.197321e+03 2.075578e+06 1.966643e+11 22
  101. afdd228b 1638400 0.000000e+00 2.242688e+04 2.707726e+03 3.139763e+05 7.144153e+09 14
  102. cea37d6d 409600 0.000000e+00 9.238189e+03 1.713378e+02 9.238189e+04 8.537349e+08 10
  103. 617e5fe6 3686400 0.000000e+00 4.357190e+04 5.271768e+03 7.842942e+05 3.467343e+10 18
  104. ####################
  105. # COMB_1
  106. # number of types devices
  107. 1
  108. ####################
  109. # DEV_0
  110. # device type (CPU - 0, CUDA - 1, OPENCL - 2, MIC - 3, SCC - 4)
  111. 1
  112. ####################
  113. # DEV_0
  114. # device id
  115. 0
  116. ####################
  117. # DEV_0
  118. # number of cores
  119. 1
  120. ##########
  121. # number of implementations
  122. 1
  123. #####
  124. # Model for cuda0_impl0 (Comb1)
  125. # number of entries
  126. 4
  127. # sumlnx sumlnx2 sumlny sumlnxlny alpha beta n minx maxx
  128. 0.000000e+00 0.000000e+00 0.000000e+00 0.000000e+00 nan nan 0 0 0
  129. # a b c
  130. nan nan nan
  131. # hash size flops mean (us) dev (us) sum sum2 n
  132. 25ebb669 8294400 0.000000e+00 9.395404e+04 4.337001e+03 1.973035e+06 1.857696e+11 21
  133. afdd228b 1638400 0.000000e+00 2.096495e+04 7.732458e+02 3.773690e+05 7.922284e+09 18
  134. cea37d6d 409600 0.000000e+00 9.471831e+03 5.475075e+02 9.471831e+04 9.001535e+08 10
  135. 617e5fe6 3686400 0.000000e+00 4.647825e+04 9.283373e+03 5.577390e+05 2.695691e+10 12
  136. ####################
  137. # COMB_0
  138. # number of types devices
  139. 1
  140. ####################
  141. # DEV_0
  142. # device type (CPU - 0, CUDA - 1, OPENCL - 2, MIC - 3, SCC - 4)
  143. 1
  144. ####################
  145. # DEV_0
  146. # device id
  147. 2
  148. ####################
  149. # DEV_0
  150. # number of cores
  151. 1
  152. ##########
  153. # number of implementations
  154. 1
  155. #####
  156. # Model for cuda2_impl0 (Comb0)
  157. # number of entries
  158. 4
  159. # sumlnx sumlnx2 sumlny sumlnxlny alpha beta n minx maxx
  160. 0.000000e+00 0.000000e+00 0.000000e+00 0.000000e+00 nan nan 0 0 0
  161. # a b c
  162. nan nan nan
  163. # hash size flops mean (us) dev (us) sum sum2 n
  164. 25ebb669 8294400 0.000000e+00 9.896522e+04 1.438963e+04 1.187583e+06 1.200141e+11 12
  165. afdd228b 1638400 0.000000e+00 2.172039e+04 1.567348e+03 2.823650e+05 6.165013e+09 13
  166. cea37d6d 409600 0.000000e+00 9.338877e+03 3.249828e+02 9.338877e+04 8.732025e+08 10
  167. 617e5fe6 3686400 0.000000e+00 4.258012e+04 2.921691e+03 8.090223e+05 3.461046e+10 19