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- ##################
- # Performance Model Version
- 44
- ####################
- # COMBs
- # number of combinations
- 4
- ####################
- # COMB_3
- # number of types devices
- 1
- ####################
- # DEV_0
- # device type (CPU - 0, CUDA - 1, OPENCL - 2, MIC - 3, SCC - 4)
- 0
- ####################
- # DEV_0
- # device id
- 0
- ####################
- # DEV_0
- # number of cores
- 1
- ##########
- # number of implementations
- 1
- #####
- # Model for cpu0_impl0 (Comb3)
- # number of entries
- 3
- # sumlnx sumlnx2 sumlny sumlnxlny alpha beta n minx maxx
- 0.000000e+00 0.000000e+00 0.000000e+00 0.000000e+00 nan nan 0 0 0
- # a b c
- nan nan nan
- # hash size flops mean (us) dev (us) sum sum2 n
- 0b0b0ce8 7372800 2.621440e+08 2.783376e+04 1.016266e+03 2.254534e+06 6.283582e+10 81
- 492beed5 66355200 7.077888e+09 7.068870e+05 1.582112e+04 5.725785e+07 4.049511e+13 81
- 4220e23d 29491200 2.097152e+09 2.135531e+05 4.787239e+03 1.729780e+07 3.695855e+12 81
- ####################
- # COMB_2
- # number of types devices
- 1
- ####################
- # DEV_0
- # device type (CPU - 0, CUDA - 1, OPENCL - 2, MIC - 3, SCC - 4)
- 1
- ####################
- # DEV_0
- # device id
- 0
- ####################
- # DEV_0
- # number of cores
- 1
- ##########
- # number of implementations
- 1
- #####
- # Model for cuda0_impl0 (Comb2)
- # number of entries
- 3
- # sumlnx sumlnx2 sumlny sumlnxlny alpha beta n minx maxx
- 0.000000e+00 0.000000e+00 0.000000e+00 0.000000e+00 nan nan 0 0 0
- # a b c
- nan nan nan
- # hash size flops mean (us) dev (us) sum sum2 n
- 0b0b0ce8 7372800 2.621440e+08 1.040745e+03 1.710737e+01 1.040745e+05 1.083442e+08 100
- 492beed5 66355200 7.077888e+09 2.322675e+04 6.514638e+01 2.438809e+06 5.664606e+10 105
- 4220e23d 29491200 2.097152e+09 7.042883e+03 4.736092e+01 7.395027e+05 5.208467e+09 105
- ####################
- # COMB_0
- # number of types devices
- 1
- ####################
- # DEV_0
- # device type (CPU - 0, CUDA - 1, OPENCL - 2, MIC - 3, SCC - 4)
- 1
- ####################
- # DEV_0
- # device id
- 1
- ####################
- # DEV_0
- # number of cores
- 1
- ##########
- # number of implementations
- 1
- #####
- # Model for cuda1_impl0 (Comb0)
- # number of entries
- 3
- # sumlnx sumlnx2 sumlny sumlnxlny alpha beta n minx maxx
- 0.000000e+00 0.000000e+00 0.000000e+00 0.000000e+00 nan nan 0 0 0
- # a b c
- nan nan nan
- # hash size flops mean (us) dev (us) sum sum2 n
- 0b0b0ce8 7372800 2.621440e+08 1.057967e+03 4.209841e+01 1.057967e+05 1.121067e+08 100
- 492beed5 66355200 7.077888e+09 2.322865e+04 8.861437e+01 2.439008e+06 5.665569e+10 105
- 4220e23d 29491200 2.097152e+09 7.053091e+03 5.410169e+01 7.405746e+05 5.223647e+09 105
- ####################
- # COMB_1
- # number of types devices
- 1
- ####################
- # DEV_0
- # device type (CPU - 0, CUDA - 1, OPENCL - 2, MIC - 3, SCC - 4)
- 1
- ####################
- # DEV_0
- # device id
- 2
- ####################
- # DEV_0
- # number of cores
- 1
- ##########
- # number of implementations
- 1
- #####
- # Model for cuda2_impl0 (Comb1)
- # number of entries
- 3
- # sumlnx sumlnx2 sumlny sumlnxlny alpha beta n minx maxx
- 0.000000e+00 0.000000e+00 0.000000e+00 0.000000e+00 nan nan 0 0 0
- # a b c
- nan nan nan
- # hash size flops mean (us) dev (us) sum sum2 n
- 0b0b0ce8 7372800 2.621440e+08 1.050834e+03 7.708100e+01 1.019309e+05 1.076889e+08 97
- 492beed5 66355200 7.077888e+09 2.323864e+04 5.619683e+01 2.440057e+06 5.670394e+10 105
- 4220e23d 29491200 2.097152e+09 7.040571e+03 3.296604e+01 7.392600e+05 5.204926e+09 105
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