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- ##################
- # Performance Model Version
- 44
- ####################
- # COMBs
- # number of combinations
- 4
- ####################
- # COMB_0
- # number of types devices
- 1
- ####################
- # DEV_0
- # device type (CPU - 0, CUDA - 1, OPENCL - 2, MIC - 3, SCC - 4)
- 0
- ####################
- # DEV_0
- # device id
- 0
- ####################
- # DEV_0
- # number of cores
- 1
- ##########
- # number of implementations
- 1
- #####
- # Model for cpu0_impl0 (Comb0)
- # number of entries
- 3
- # sumlnx sumlnx2 sumlny sumlnxlny alpha beta n minx maxx
- 0.000000e+00 0.000000e+00 0.000000e+00 0.000000e+00 nan nan 0 0 0
- # a b c
- nan nan nan
- # hash size flops mean (us) dev (us) sum sum2 n
- f2ff9ae5 34480152 0.000000e+00 4.419323e+01 9.394629e+00 1.825180e+04 8.430572e+05 413
- fb4b8624 4427800 0.000000e+00 1.267467e+01 2.411186e+00 5.754301e+03 7.557335e+04 454
- 4af260f6 14678040 0.000000e+00 2.442142e+01 5.135780e+00 1.394463e+04 3.556084e+05 571
- ####################
- # COMB_2
- # number of types devices
- 1
- ####################
- # DEV_0
- # device type (CPU - 0, CUDA - 1, OPENCL - 2, MIC - 3, SCC - 4)
- 1
- ####################
- # DEV_0
- # device id
- 0
- ####################
- # DEV_0
- # number of cores
- 1
- ##########
- # number of implementations
- 1
- #####
- # Model for cuda0_impl0 (Comb2)
- # number of entries
- 3
- # sumlnx sumlnx2 sumlny sumlnxlny alpha beta n minx maxx
- 0.000000e+00 0.000000e+00 0.000000e+00 0.000000e+00 nan nan 0 0 0
- # a b c
- nan nan nan
- # hash size flops mean (us) dev (us) sum sum2 n
- f2ff9ae5 34480152 0.000000e+00 3.910144e+01 6.371108e+00 1.329449e+03 5.336347e+04 34
- fb4b8624 4427800 0.000000e+00 3.998483e+01 8.150933e+00 2.519044e+03 1.049091e+05 63
- 4af260f6 14678040 0.000000e+00 3.398450e+01 5.156207e+00 8.156280e+02 2.835679e+04 24
- ####################
- # COMB_3
- # number of types devices
- 1
- ####################
- # DEV_0
- # device type (CPU - 0, CUDA - 1, OPENCL - 2, MIC - 3, SCC - 4)
- 1
- ####################
- # DEV_0
- # device id
- 1
- ####################
- # DEV_0
- # number of cores
- 1
- ##########
- # number of implementations
- 1
- #####
- # Model for cuda1_impl0 (Comb3)
- # number of entries
- 3
- # sumlnx sumlnx2 sumlny sumlnxlny alpha beta n minx maxx
- 0.000000e+00 0.000000e+00 0.000000e+00 0.000000e+00 nan nan 0 0 0
- # a b c
- nan nan nan
- # hash size flops mean (us) dev (us) sum sum2 n
- f2ff9ae5 34480152 0.000000e+00 3.173112e+01 3.816078e+00 7.615470e+02 2.451424e+04 24
- fb4b8624 4427800 0.000000e+00 2.860497e+01 5.248990e+00 1.029779e+03 3.044867e+04 36
- 4af260f6 14678040 0.000000e+00 3.652883e+01 8.229435e+00 1.716855e+03 6.589771e+04 47
- ####################
- # COMB_1
- # number of types devices
- 1
- ####################
- # DEV_0
- # device type (CPU - 0, CUDA - 1, OPENCL - 2, MIC - 3, SCC - 4)
- 1
- ####################
- # DEV_0
- # device id
- 2
- ####################
- # DEV_0
- # number of cores
- 1
- ##########
- # number of implementations
- 1
- #####
- # Model for cuda2_impl0 (Comb1)
- # number of entries
- 3
- # sumlnx sumlnx2 sumlny sumlnxlny alpha beta n minx maxx
- 0.000000e+00 0.000000e+00 0.000000e+00 0.000000e+00 nan nan 0 0 0
- # a b c
- nan nan nan
- # hash size flops mean (us) dev (us) sum sum2 n
- f2ff9ae5 34480152 0.000000e+00 3.719045e+01 7.851419e+00 2.566141e+03 9.968943e+04 69
- fb4b8624 4427800 0.000000e+00 4.509905e+01 6.110617e+00 9.470800e+02 4.349654e+04 21
- 4af260f6 14678040 0.000000e+00 2.634116e+01 3.746211e+00 6.479926e+03 1.741412e+05 246
|
