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- ##################
- # Performance Model Version
- 44
- ####################
- # COMBs
- # number of combinations
- 4
- ####################
- # COMB_3
- # number of types devices
- 1
- ####################
- # DEV_0
- # device type (CPU - 0, CUDA - 1, OPENCL - 2, MIC - 3, SCC - 4)
- 0
- ####################
- # DEV_0
- # device id
- 0
- ####################
- # DEV_0
- # number of cores
- 1
- ##########
- # number of implementations
- 1
- #####
- # Model for cpu0_impl0 (Comb3)
- # number of entries
- 3
- # sumlnx sumlnx2 sumlny sumlnxlny alpha beta n minx maxx
- 0.000000e+00 0.000000e+00 0.000000e+00 0.000000e+00 nan nan 0 0 0
- # a b c
- nan nan nan
- # hash size flops mean (us) dev (us) sum sum2 n
- 0b0b0ce8 3686400 2.621440e+08 1.352609e+04 3.616534e+02 1.082087e+06 1.464687e+10 80
- 492beed5 33177600 7.077888e+09 3.550396e+05 8.949994e+03 2.840317e+07 1.009066e+13 80
- 4220e23d 14745600 2.097152e+09 1.078112e+05 1.983800e+03 8.624897e+06 9.301755e+11 80
- ####################
- # COMB_1
- # number of types devices
- 1
- ####################
- # DEV_0
- # device type (CPU - 0, CUDA - 1, OPENCL - 2, MIC - 3, SCC - 4)
- 1
- ####################
- # DEV_0
- # device id
- 0
- ####################
- # DEV_0
- # number of cores
- 1
- ##########
- # number of implementations
- 1
- #####
- # Model for cuda0_impl0 (Comb1)
- # number of entries
- 3
- # sumlnx sumlnx2 sumlny sumlnxlny alpha beta n minx maxx
- 0.000000e+00 0.000000e+00 0.000000e+00 0.000000e+00 nan nan 0 0 0
- # a b c
- nan nan nan
- # hash size flops mean (us) dev (us) sum sum2 n
- 0b0b0ce8 3686400 2.621440e+08 6.589631e+02 8.406511e+00 6.787320e+04 4.473321e+07 103
- 492beed5 33177600 7.077888e+09 1.151398e+04 9.050114e+01 1.220482e+06 1.405348e+10 106
- 4220e23d 14745600 2.097152e+09 5.574713e+03 3.353004e+02 5.909196e+05 3.306125e+09 106
- ####################
- # COMB_0
- # number of types devices
- 1
- ####################
- # DEV_0
- # device type (CPU - 0, CUDA - 1, OPENCL - 2, MIC - 3, SCC - 4)
- 1
- ####################
- # DEV_0
- # device id
- 1
- ####################
- # DEV_0
- # number of cores
- 1
- ##########
- # number of implementations
- 1
- #####
- # Model for cuda1_impl0 (Comb0)
- # number of entries
- 3
- # sumlnx sumlnx2 sumlny sumlnxlny alpha beta n minx maxx
- 0.000000e+00 0.000000e+00 0.000000e+00 0.000000e+00 nan nan 0 0 0
- # a b c
- nan nan nan
- # hash size flops mean (us) dev (us) sum sum2 n
- 0b0b0ce8 3686400 2.621440e+08 6.663664e+02 8.616537e+01 6.796937e+04 4.604980e+07 102
- 492beed5 33177600 7.077888e+09 1.150036e+04 8.404527e+01 1.207538e+06 1.388786e+10 105
- 4220e23d 14745600 2.097152e+09 5.579034e+03 3.672012e+02 5.857985e+05 3.282348e+09 105
- ####################
- # COMB_2
- # number of types devices
- 1
- ####################
- # DEV_0
- # device type (CPU - 0, CUDA - 1, OPENCL - 2, MIC - 3, SCC - 4)
- 1
- ####################
- # DEV_0
- # device id
- 2
- ####################
- # DEV_0
- # number of cores
- 1
- ##########
- # number of implementations
- 1
- #####
- # Model for cuda2_impl0 (Comb2)
- # number of entries
- 3
- # sumlnx sumlnx2 sumlny sumlnxlny alpha beta n minx maxx
- 0.000000e+00 0.000000e+00 0.000000e+00 0.000000e+00 nan nan 0 0 0
- # a b c
- nan nan nan
- # hash size flops mean (us) dev (us) sum sum2 n
- 0b0b0ce8 3686400 2.621440e+08 6.181769e+02 5.174143e+01 6.181769e+04 3.848198e+07 100
- 492beed5 33177600 7.077888e+09 1.148096e+04 7.289415e+01 1.205501e+06 1.384086e+10 105
- 4220e23d 14745600 2.097152e+09 5.580581e+03 3.970717e+02 5.859610e+05 3.286558e+09 105
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