chol_model_11.sirocco 5.4 KB

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  1. ##################
  2. # Performance Model Version
  3. 44
  4. ####################
  5. # COMBs
  6. # number of combinations
  7. 5
  8. ####################
  9. # COMB_0
  10. # number of types devices
  11. 1
  12. ####################
  13. # DEV_0
  14. # device type (CPU - 0, CUDA - 1, OPENCL - 2, MIC - 3, SCC - 4)
  15. 0
  16. ####################
  17. # DEV_0
  18. # device id
  19. 0
  20. ####################
  21. # DEV_0
  22. # number of cores
  23. 1
  24. ##########
  25. # number of implementations
  26. 1
  27. #####
  28. # Model for cpu0_impl0 (Comb0)
  29. # number of entries
  30. 4
  31. # sumlnx sumlnx2 sumlny sumlnxlny alpha beta n minx maxx
  32. 0.000000e+00 0.000000e+00 0.000000e+00 0.000000e+00 nan nan 0 0 0
  33. # a b c
  34. nan nan nan
  35. # hash size flops mean (us) dev (us) sum sum2 n
  36. 25ebb669 8294400 9.963650e+08 1.842284e+04 2.612920e+03 1.271176e+06 2.388975e+10 69
  37. 617e5fe6 3686400 2.953730e+08 7.379027e+03 1.089221e+03 5.903221e+05 4.450915e+09 80
  38. afdd228b 1638400 8.758624e+07 2.799281e+03 5.546704e+02 2.323403e+05 6.759213e+08 83
  39. cea37d6d 409600 1.097392e+07 4.391691e+02 4.300491e+01 7.597626e+04 3.368638e+07 173
  40. ####################
  41. # COMB_3
  42. # number of types devices
  43. 1
  44. ####################
  45. # DEV_0
  46. # device type (CPU - 0, CUDA - 1, OPENCL - 2, MIC - 3, SCC - 4)
  47. 1
  48. ####################
  49. # DEV_0
  50. # device id
  51. 3
  52. ####################
  53. # DEV_0
  54. # number of cores
  55. 1
  56. ##########
  57. # number of implementations
  58. 1
  59. #####
  60. # Model for cuda3_impl0 (Comb3)
  61. # number of entries
  62. 4
  63. # sumlnx sumlnx2 sumlny sumlnxlny alpha beta n minx maxx
  64. 0.000000e+00 0.000000e+00 0.000000e+00 0.000000e+00 nan nan 0 0 0
  65. # a b c
  66. nan nan nan
  67. # hash size flops mean (us) dev (us) sum sum2 n
  68. 25ebb669 8294400 9.963650e+08 4.852293e+04 1.266847e+04 4.852293e+05 2.514965e+10 10
  69. 617e5fe6 3686400 2.953730e+08 7.699799e+03 1.513211e+03 9.239759e+04 7.389205e+08 12
  70. afdd228b 1638400 8.758624e+07 5.010966e+03 7.544427e+02 5.010965e+04 2.567896e+08 10
  71. cea37d6d 409600 1.097392e+07 3.343709e+03 3.943178e+02 3.343709e+04 1.133588e+08 10
  72. ####################
  73. # COMB_2
  74. # number of types devices
  75. 1
  76. ####################
  77. # DEV_0
  78. # device type (CPU - 0, CUDA - 1, OPENCL - 2, MIC - 3, SCC - 4)
  79. 1
  80. ####################
  81. # DEV_0
  82. # device id
  83. 1
  84. ####################
  85. # DEV_0
  86. # number of cores
  87. 1
  88. ##########
  89. # number of implementations
  90. 1
  91. #####
  92. # Model for cuda1_impl0 (Comb2)
  93. # number of entries
  94. 4
  95. # sumlnx sumlnx2 sumlny sumlnxlny alpha beta n minx maxx
  96. 0.000000e+00 0.000000e+00 0.000000e+00 0.000000e+00 nan nan 0 0 0
  97. # a b c
  98. nan nan nan
  99. # hash size flops mean (us) dev (us) sum sum2 n
  100. 25ebb669 8294400 9.963650e+08 3.188534e+04 1.123169e+04 3.188534e+05 1.142826e+10 10
  101. 617e5fe6 3686400 2.953730e+08 8.514691e+03 1.568765e+03 9.366160e+04 8.245709e+08 11
  102. afdd228b 1638400 8.758624e+07 5.436465e+03 1.325711e+03 5.436465e+04 3.131266e+08 10
  103. cea37d6d 409600 1.097392e+07 3.336739e+03 3.113015e+02 3.336739e+04 1.123074e+08 10
  104. ####################
  105. # COMB_1
  106. # number of types devices
  107. 1
  108. ####################
  109. # DEV_0
  110. # device type (CPU - 0, CUDA - 1, OPENCL - 2, MIC - 3, SCC - 4)
  111. 1
  112. ####################
  113. # DEV_0
  114. # device id
  115. 0
  116. ####################
  117. # DEV_0
  118. # number of cores
  119. 1
  120. ##########
  121. # number of implementations
  122. 1
  123. #####
  124. # Model for cuda0_impl0 (Comb1)
  125. # number of entries
  126. 4
  127. # sumlnx sumlnx2 sumlny sumlnxlny alpha beta n minx maxx
  128. 0.000000e+00 0.000000e+00 0.000000e+00 0.000000e+00 nan nan 0 0 0
  129. # a b c
  130. nan nan nan
  131. # hash size flops mean (us) dev (us) sum sum2 n
  132. 25ebb669 8294400 9.963650e+08 3.051372e+04 1.107281e+04 3.051372e+05 1.053694e+10 10
  133. 617e5fe6 3686400 2.953730e+08 8.456328e+03 1.411439e+03 1.014759e+05 8.820196e+08 12
  134. afdd228b 1638400 8.758624e+07 4.996835e+03 9.396038e+02 4.996835e+04 2.585122e+08 10
  135. cea37d6d 409600 1.097392e+07 3.060839e+03 4.968177e+01 3.060839e+04 9.371202e+07 10
  136. ####################
  137. # COMB_4
  138. # number of types devices
  139. 1
  140. ####################
  141. # DEV_0
  142. # device type (CPU - 0, CUDA - 1, OPENCL - 2, MIC - 3, SCC - 4)
  143. 1
  144. ####################
  145. # DEV_0
  146. # device id
  147. 2
  148. ####################
  149. # DEV_0
  150. # number of cores
  151. 1
  152. ##########
  153. # number of implementations
  154. 1
  155. #####
  156. # Model for cuda2_impl0 (Comb4)
  157. # number of entries
  158. 4
  159. # sumlnx sumlnx2 sumlny sumlnxlny alpha beta n minx maxx
  160. 0.000000e+00 0.000000e+00 0.000000e+00 0.000000e+00 nan nan 0 0 0
  161. # a b c
  162. nan nan nan
  163. # hash size flops mean (us) dev (us) sum sum2 n
  164. 25ebb669 8294400 9.963650e+08 1.332935e+04 3.063746e+03 2.132696e+05 2.992929e+09 16
  165. 617e5fe6 3686400 2.953730e+08 8.333388e+03 1.108400e+03 1.000007e+05 8.480868e+08 12
  166. afdd228b 1638400 8.758624e+07 5.517925e+03 1.047059e+03 5.517925e+04 3.154382e+08 10
  167. cea37d6d 409600 1.097392e+07 3.435367e+03 2.405829e+02 3.435367e+04 1.185962e+08 10