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starpu_slu_lu_model_11.idgraf

starpu_slu_lu_model_11.idgraf 8.9 KB
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  1. ##################
    2. 

  2. # Performance Model Version
    3. 

  3. 45
    4. 

  4. 

  5. ####################
    6. 

  6. # COMBs
    7. 

  7. # number of combinations
    8. 

  8. 9
    9. 

  9. ####################
    10. 

  10. # COMB_8
    11. 

  11. # number of types devices
    12. 

  12. 1
    13. 

  13. ####################
    14. 

  14. # DEV_0
    15. 

  15. # device type (CPU - 0, CUDA - 1, OPENCL - 2, MIC - 3)
    16. 

  16. 0
    17. 

  17. ####################
    18. 

  18. # DEV_0
    19. 

  19. # device id 
    20. 

  20. 0
    21. 

  21. ####################
    22. 

  22. # DEV_0
    23. 

  23. # number of cores 
    24. 

  24. 1
    25. 

  25. ##########
    26. 

  26. # number of implementations
    27. 

  27. 1
    28. 

  28. #####
    29. 

  29. # Model for cpu0_impl0 (Comb8)
    30. 

  30. # number of entries
    31. 

  31. 3
    32. 

  32. # sumlnx	sumlnx2		sumlny		sumlnxlny	alpha		beta		n	minx		maxx
    33. 

  33. 0.000000e+00   	0.000000e+00   	0.000000e+00   	0.000000e+00   	nan            	nan            	0	0              	0              
    34. 

  34. # a		b		c
    35. 

  35. nan            	nan            	nan            
    36. 

  36. # not multiple-regression-base
    37. 

  37. 0
    38. 

  38. # hash		size		flops		mean (us)	dev (us)	sum		sum2		n
    39. 

  39. cea37d6d	409600         	0.000000e+00   	4.307978e+03   	6.474305e+01   	1.249314e+05   	5.383232e+08   	29
    40. 

  40. afdd228b	1638400        	0.000000e+00   	3.550524e+04   	4.451382e+02   	3.550524e+05   	1.260821e+10   	10
    41. 

  41. 617e5fe6	3686400        	0.000000e+00   	1.169735e+05   	9.368471e+02   	1.169735e+06   	1.368368e+11   	10
    42. 

  42. 

  43. ####################
    44. 

  44. # COMB_3
    45. 

  45. # number of types devices
    46. 

  46. 1
    47. 

  47. ####################
    48. 

  48. # DEV_0
    49. 

  49. # device type (CPU - 0, CUDA - 1, OPENCL - 2, MIC - 3)
    50. 

  50. 1
    51. 

  51. ####################
    52. 

  52. # DEV_0
    53. 

  53. # device id 
    54. 

  54. 0
    55. 

  55. ####################
    56. 

  56. # DEV_0
    57. 

  57. # number of cores 
    58. 

  58. 1
    59. 

  59. ##########
    60. 

  60. # number of implementations
    61. 

  61. 1
    62. 

  62. #####
    63. 

  63. # Model for cuda0_impl0 (Comb3)
    64. 

  64. # number of entries
    65. 

  65. 3
    66. 

  66. # sumlnx	sumlnx2		sumlny		sumlnxlny	alpha		beta		n	minx		maxx
    67. 

  67. 0.000000e+00   	0.000000e+00   	0.000000e+00   	0.000000e+00   	nan            	nan            	0	0              	0              
    68. 

  68. # a		b		c
    69. 

  69. nan            	nan            	nan            
    70. 

  70. # not multiple-regression-base
    71. 

  71. 0
    72. 

  72. # hash		size		flops		mean (us)	dev (us)	sum		sum2		n
    73. 

  73. cea37d6d	409600         	0.000000e+00   	1.140547e+04   	1.799023e+03   	1.140547e+05   	1.333212e+09   	10
    74. 

  74. afdd228b	1638400        	0.000000e+00   	2.728447e+04   	8.307498e+02   	2.728447e+05   	7.451326e+09   	10
    75. 

  75. 617e5fe6	3686400        	0.000000e+00   	6.234962e+04   	7.670296e+03   	6.858458e+05   	4.340939e+10   	11
    76. 

  76. 

  77. ####################
    78. 

  78. # COMB_2
    79. 

  79. # number of types devices
    80. 

  80. 1
    81. 

  81. ####################
    82. 

  82. # DEV_0
    83. 

  83. # device type (CPU - 0, CUDA - 1, OPENCL - 2, MIC - 3)
    84. 

  84. 1
    85. 

  85. ####################
    86. 

  86. # DEV_0
    87. 

  87. # device id 
    88. 

  88. 5
    89. 

  89. ####################
    90. 

  90. # DEV_0
    91. 

  91. # number of cores 
    92. 

  92. 1
    93. 

  93. ##########
    94. 

  94. # number of implementations
    95. 

  95. 1
    96. 

  96. #####
    97. 

  97. # Model for cuda5_impl0 (Comb2)
    98. 

  98. # number of entries
    99. 

  99. 3
    100. 

  100. # sumlnx	sumlnx2		sumlny		sumlnxlny	alpha		beta		n	minx		maxx
    101. 

  101. 0.000000e+00   	0.000000e+00   	0.000000e+00   	0.000000e+00   	nan            	nan            	0	0              	0              
    102. 

  102. # a		b		c
    103. 

  103. nan            	nan            	nan            
    104. 

  104. # not multiple-regression-base
    105. 

  105. 0
    106. 

  106. # hash		size		flops		mean (us)	dev (us)	sum		sum2		n
    107. 

  107. afdd228b	1638400        	0.000000e+00   	3.084154e+04   	4.741973e+03   	3.084154e+05   	9.736872e+09   	10
    108. 

  108. cea37d6d	409600         	0.000000e+00   	1.194801e+04   	1.916839e+03   	1.194801e+05   	1.464291e+09   	10
    109. 

  109. 617e5fe6	3686400        	0.000000e+00   	6.590141e+04   	1.170188e+04   	6.590141e+05   	4.479930e+10   	10
    110. 

  110. 

  111. ####################
    112. 

  112. # COMB_1
    113. 

  113. # number of types devices
    114. 

  114. 1
    115. 

  115. ####################
    116. 

  116. # DEV_0
    117. 

  117. # device type (CPU - 0, CUDA - 1, OPENCL - 2, MIC - 3)
    118. 

  118. 1
    119. 

  119. ####################
    120. 

  120. # DEV_0
    121. 

  121. # device id 
    122. 

  122. 6
    123. 

  123. ####################
    124. 

  124. # DEV_0
    125. 

  125. # number of cores 
    126. 

  126. 1
    127. 

  127. ##########
    128. 

  128. # number of implementations
    129. 

  129. 1
    130. 

  130. #####
    131. 

  131. # Model for cuda6_impl0 (Comb1)
    132. 

  132. # number of entries
    133. 

  133. 3
    134. 

  134. # sumlnx	sumlnx2		sumlny		sumlnxlny	alpha		beta		n	minx		maxx
    135. 

  135. 0.000000e+00   	0.000000e+00   	0.000000e+00   	0.000000e+00   	nan            	nan            	0	0              	0              
    136. 

  136. # a		b		c
    137. 

  137. nan            	nan            	nan            
    138. 

  138. # not multiple-regression-base
    139. 

  139. 0
    140. 

  140. # hash		size		flops		mean (us)	dev (us)	sum		sum2		n
    141. 

  141. 617e5fe6	3686400        	0.000000e+00   	7.169178e+04   	1.134864e+04   	7.886096e+05   	5.795353e+10   	11
    142. 

  142. cea37d6d	409600         	0.000000e+00   	1.144166e+04   	1.161786e+03   	1.144166e+05   	1.322613e+09   	10
    143. 

  143. afdd228b	1638400        	0.000000e+00   	2.872444e+04   	2.010264e+03   	3.159688e+05   	9.120481e+09   	11
    144. 

  144. 

  145. ####################
    146. 

  146. # COMB_0
    147. 

  147. # number of types devices
    148. 

  148. 1
    149. 

  149. ####################
    150. 

  150. # DEV_0
    151. 

  151. # device type (CPU - 0, CUDA - 1, OPENCL - 2, MIC - 3)
    152. 

  152. 1
    153. 

  153. ####################
    154. 

  154. # DEV_0
    155. 

  155. # device id 
    156. 

  156. 4
    157. 

  157. ####################
    158. 

  158. # DEV_0
    159. 

  159. # number of cores 
    160. 

  160. 1
    161. 

  161. ##########
    162. 

  162. # number of implementations
    163. 

  163. 1
    164. 

  164. #####
    165. 

  165. # Model for cuda4_impl0 (Comb0)
    166. 

  166. # number of entries
    167. 

  167. 3
    168. 

  168. # sumlnx	sumlnx2		sumlny		sumlnxlny	alpha		beta		n	minx		maxx
    169. 

  169. 0.000000e+00   	0.000000e+00   	0.000000e+00   	0.000000e+00   	nan            	nan            	0	0              	0              
    170. 

  170. # a		b		c
    171. 

  171. nan            	nan            	nan            
    172. 

  172. # not multiple-regression-base
    173. 

  173. 0
    174. 

  174. # hash		size		flops		mean (us)	dev (us)	sum		sum2		n
    175. 

  175. cea37d6d	409600         	0.000000e+00   	1.150326e+04   	1.434617e+03   	1.150326e+05   	1.343832e+09   	10
    176. 

  176. afdd228b	1638400        	0.000000e+00   	3.088151e+04   	4.858348e+03   	3.088151e+05   	9.772711e+09   	10
    177. 

  177. 617e5fe6	3686400        	0.000000e+00   	6.102500e+04   	7.308309e+03   	6.102500e+05   	3.777463e+10   	10
    178. 

  178. 

  179. ####################
    180. 

  180. # COMB_4
    181. 

  181. # number of types devices
    182. 

  182. 1
    183. 

  183. ####################
    184. 

  184. # DEV_0
    185. 

  185. # device type (CPU - 0, CUDA - 1, OPENCL - 2, MIC - 3)
    186. 

  186. 1
    187. 

  187. ####################
    188. 

  188. # DEV_0
    189. 

  189. # device id 
    190. 

  190. 7
    191. 

  191. ####################
    192. 

  192. # DEV_0
    193. 

  193. # number of cores 
    194. 

  194. 1
    195. 

  195. ##########
    196. 

  196. # number of implementations
    197. 

  197. 1
    198. 

  198. #####
    199. 

  199. # Model for cuda7_impl0 (Comb4)
    200. 

  200. # number of entries
    201. 

  201. 3
    202. 

  202. # sumlnx	sumlnx2		sumlny		sumlnxlny	alpha		beta		n	minx		maxx
    203. 

  203. 0.000000e+00   	0.000000e+00   	0.000000e+00   	0.000000e+00   	nan            	nan            	0	0              	0              
    204. 

  204. # a		b		c
    205. 

  205. nan            	nan            	nan            
    206. 

  206. # not multiple-regression-base
    207. 

  207. 0
    208. 

  208. # hash		size		flops		mean (us)	dev (us)	sum		sum2		n
    209. 

  209. 617e5fe6	3686400        	0.000000e+00   	5.751510e+04   	2.006299e+03   	6.901812e+05   	3.974415e+10   	12
    210. 

  210. cea37d6d	409600         	0.000000e+00   	1.125363e+04   	1.219431e+03   	1.125363e+05   	1.281312e+09   	10
    211. 

  211. afdd228b	1638400        	0.000000e+00   	3.238968e+04   	5.459084e+03   	3.238968e+05   	1.078893e+10   	10
    212. 

  212. 

  213. ####################
    214. 

  214. # COMB_6
    215. 

  215. # number of types devices
    216. 

  216. 1
    217. 

  217. ####################
    218. 

  218. # DEV_0
    219. 

  219. # device type (CPU - 0, CUDA - 1, OPENCL - 2, MIC - 3)
    220. 

  220. 1
    221. 

  221. ####################
    222. 

  222. # DEV_0
    223. 

  223. # device id 
    224. 

  224. 3
    225. 

  225. ####################
    226. 

  226. # DEV_0
    227. 

  227. # number of cores 
    228. 

  228. 1
    229. 

  229. ##########
    230. 

  230. # number of implementations
    231. 

  231. 1
    232. 

  232. #####
    233. 

  233. # Model for cuda3_impl0 (Comb6)
    234. 

  234. # number of entries
    235. 

  235. 3
    236. 

  236. # sumlnx	sumlnx2		sumlny		sumlnxlny	alpha		beta		n	minx		maxx
    237. 

  237. 0.000000e+00   	0.000000e+00   	0.000000e+00   	0.000000e+00   	nan            	nan            	0	0              	0              
    238. 

  238. # a		b		c
    239. 

  239. nan            	nan            	nan            
    240. 

  240. # not multiple-regression-base
    241. 

  241. 0
    242. 

  242. # hash		size		flops		mean (us)	dev (us)	sum		sum2		n
    243. 

  243. afdd228b	1638400        	0.000000e+00   	2.926764e+04   	3.325362e+03   	3.219440e+05   	9.544181e+09   	11
    244. 

  244. cea37d6d	409600         	0.000000e+00   	1.088648e+04   	1.129883e+03   	1.088648e+05   	1.197920e+09   	10
    245. 

  245. 617e5fe6	3686400        	0.000000e+00   	6.506731e+04   	1.183046e+04   	8.458750e+05   	5.685829e+10   	13
    246. 

  246. 

  247. ####################
    248. 

  248. # COMB_5
    249. 

  249. # number of types devices
    250. 

  250. 1
    251. 

  251. ####################
    252. 

  252. # DEV_0
    253. 

  253. # device type (CPU - 0, CUDA - 1, OPENCL - 2, MIC - 3)
    254. 

  254. 1
    255. 

  255. ####################
    256. 

  256. # DEV_0
    257. 

  257. # device id 
    258. 

  258. 1
    259. 

  259. ####################
    260. 

  260. # DEV_0
    261. 

  261. # number of cores 
    262. 

  262. 1
    263. 

  263. ##########
    264. 

  264. # number of implementations
    265. 

  265. 1
    266. 

  266. #####
    267. 

  267. # Model for cuda1_impl0 (Comb5)
    268. 

  268. # number of entries
    269. 

  269. 3
    270. 

  270. # sumlnx	sumlnx2		sumlny		sumlnxlny	alpha		beta		n	minx		maxx
    271. 

  271. 0.000000e+00   	0.000000e+00   	0.000000e+00   	0.000000e+00   	nan            	nan            	0	0              	0              
    272. 

  272. # a		b		c
    273. 

  273. nan            	nan            	nan            
    274. 

  274. # not multiple-regression-base
    275. 

  275. 0
    276. 

  276. # hash		size		flops		mean (us)	dev (us)	sum		sum2		n
    277. 

  277. afdd228b	1638400        	0.000000e+00   	2.775893e+04   	1.476662e+03   	3.331071e+05   	9.272862e+09   	12
    278. 

  278. cea37d6d	409600         	0.000000e+00   	1.026126e+04   	8.160679e+01   	1.026126e+05   	1.053001e+09   	10
    279. 

  279. 617e5fe6	3686400        	0.000000e+00   	6.215917e+04   	1.023772e+04   	6.215917e+05   	3.968573e+10   	10
    280. 

  280. 

  281. ####################
    282. 

  282. # COMB_7
    283. 

  283. # number of types devices
    284. 

  284. 1
    285. 

  285. ####################
    286. 

  286. # DEV_0
    287. 

  287. # device type (CPU - 0, CUDA - 1, OPENCL - 2, MIC - 3)
    288. 

  288. 1
    289. 

  289. ####################
    290. 

  290. # DEV_0
    291. 

  291. # device id 
    292. 

  292. 2
    293. 

  293. ####################
    294. 

  294. # DEV_0
    295. 

  295. # number of cores 
    296. 

  296. 1
    297. 

  297. ##########
    298. 

  298. # number of implementations
    299. 

  299. 1
    300. 

  300. #####
    301. 

  301. # Model for cuda2_impl0 (Comb7)
    302. 

  302. # number of entries
    303. 

  303. 3
    304. 

  304. # sumlnx	sumlnx2		sumlny		sumlnxlny	alpha		beta		n	minx		maxx
    305. 

  305. 0.000000e+00   	0.000000e+00   	0.000000e+00   	0.000000e+00   	nan            	nan            	0	0              	0              
    306. 

  306. # a		b		c
    307. 

  307. nan            	nan            	nan            
    308. 

  308. # not multiple-regression-base
    309. 

  309. 0
    310. 

  310. # hash		size		flops		mean (us)	dev (us)	sum		sum2		n
    311. 

  311. cea37d6d	409600         	0.000000e+00   	1.022286e+04   	3.601879e+01   	1.022286e+05   	1.045081e+09   	10
    312. 

  312. afdd228b	1638400        	0.000000e+00   	2.891317e+04   	4.592264e+03   	2.891317e+05   	8.570604e+09   	10
    313. 

  313. 617e5fe6	3686400        	0.000000e+00   	5.724831e+04   	3.045025e+03   	7.442280e+05   	4.272633e+10   	13
    314. 

  314. 

  315.