chol_model_22.sirocco 4.9 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169
  1. ##################
  2. # Performance Model Version
  3. 44
  4. ####################
  5. # COMBs
  6. # number of combinations
  7. 5
  8. ####################
  9. # COMB_4
  10. # number of types devices
  11. 1
  12. ####################
  13. # DEV_0
  14. # device type (CPU - 0, CUDA - 1, OPENCL - 2, MIC - 3, SCC - 4)
  15. 1
  16. ####################
  17. # DEV_0
  18. # device id
  19. 1
  20. ####################
  21. # DEV_0
  22. # number of cores
  23. 1
  24. ##########
  25. # number of implementations
  26. 1
  27. #####
  28. # Model for cuda1_impl0 (Comb4)
  29. # number of entries
  30. 3
  31. # sumlnx sumlnx2 sumlny sumlnxlny alpha beta n minx maxx
  32. 0.000000e+00 0.000000e+00 0.000000e+00 0.000000e+00 nan nan 0 0 0
  33. # a b c
  34. nan nan nan
  35. # hash size flops mean (us) dev (us) sum sum2 n
  36. 24c84a50 11059200 1.769472e+09 7.545142e+02 4.622075e+01 1.174100e+07 8.891991e+09 15561
  37. f0ac7beb 4915200 5.242880e+08 2.651541e+02 2.896639e+01 2.197862e+06 5.897272e+08 8289
  38. d46431bb 1228800 6.553600e+07 5.633559e+01 1.027680e+01 7.345034e+05 4.275566e+07 13038
  39. ####################
  40. # COMB_1
  41. # number of types devices
  42. 1
  43. ####################
  44. # DEV_0
  45. # device type (CPU - 0, CUDA - 1, OPENCL - 2, MIC - 3, SCC - 4)
  46. 1
  47. ####################
  48. # DEV_0
  49. # device id
  50. 0
  51. ####################
  52. # DEV_0
  53. # number of cores
  54. 1
  55. ##########
  56. # number of implementations
  57. 1
  58. #####
  59. # Model for cuda0_impl0 (Comb1)
  60. # number of entries
  61. 3
  62. # sumlnx sumlnx2 sumlny sumlnxlny alpha beta n minx maxx
  63. 0.000000e+00 0.000000e+00 0.000000e+00 0.000000e+00 nan nan 0 0 0
  64. # a b c
  65. nan nan nan
  66. # hash size flops mean (us) dev (us) sum sum2 n
  67. 24c84a50 11059200 1.769472e+09 7.434516e+02 4.620554e+01 1.184541e+07 8.840509e+09 15933
  68. f0ac7beb 4915200 5.242880e+08 2.633265e+02 2.997768e+01 2.185610e+06 5.829880e+08 8300
  69. d46431bb 1228800 6.553600e+07 5.716015e+01 1.157773e+01 6.223597e+05 3.703364e+07 10888
  70. ####################
  71. # COMB_2
  72. # number of types devices
  73. 1
  74. ####################
  75. # DEV_0
  76. # device type (CPU - 0, CUDA - 1, OPENCL - 2, MIC - 3, SCC - 4)
  77. 1
  78. ####################
  79. # DEV_0
  80. # device id
  81. 3
  82. ####################
  83. # DEV_0
  84. # number of cores
  85. 1
  86. ##########
  87. # number of implementations
  88. 1
  89. #####
  90. # Model for cuda3_impl0 (Comb2)
  91. # number of entries
  92. 3
  93. # sumlnx sumlnx2 sumlny sumlnxlny alpha beta n minx maxx
  94. 0.000000e+00 0.000000e+00 0.000000e+00 0.000000e+00 nan nan 0 0 0
  95. # a b c
  96. nan nan nan
  97. # hash size flops mean (us) dev (us) sum sum2 n
  98. 24c84a50 11059200 1.769472e+09 7.437036e+02 4.816754e+01 1.192752e+07 8.907749e+09 16038
  99. f0ac7beb 4915200 5.242880e+08 2.593699e+02 2.791728e+01 2.302427e+06 6.040986e+08 8877
  100. d46431bb 1228800 6.553600e+07 5.656092e+01 1.160148e+01 5.523739e+05 3.255722e+07 9766
  101. ####################
  102. # COMB_3
  103. # number of types devices
  104. 1
  105. ####################
  106. # DEV_0
  107. # device type (CPU - 0, CUDA - 1, OPENCL - 2, MIC - 3, SCC - 4)
  108. 1
  109. ####################
  110. # DEV_0
  111. # device id
  112. 2
  113. ####################
  114. # DEV_0
  115. # number of cores
  116. 1
  117. ##########
  118. # number of implementations
  119. 1
  120. #####
  121. # Model for cuda2_impl0 (Comb3)
  122. # number of entries
  123. 3
  124. # sumlnx sumlnx2 sumlny sumlnxlny alpha beta n minx maxx
  125. 0.000000e+00 0.000000e+00 0.000000e+00 0.000000e+00 nan nan 0 0 0
  126. # a b c
  127. nan nan nan
  128. # hash size flops mean (us) dev (us) sum sum2 n
  129. 24c84a50 11059200 1.769472e+09 7.558763e+02 4.610795e+01 1.204791e+07 9.140616e+09 15939
  130. f0ac7beb 4915200 5.242880e+08 2.625144e+02 2.860172e+01 2.207221e+06 5.863054e+08 8408
  131. d46431bb 1228800 6.553600e+07 5.829194e+01 1.220705e+01 7.805874e+05 4.749737e+07 13391
  132. ####################
  133. # COMB_0
  134. # number of types devices
  135. 1
  136. ####################
  137. # DEV_0
  138. # device type (CPU - 0, CUDA - 1, OPENCL - 2, MIC - 3, SCC - 4)
  139. 0
  140. ####################
  141. # DEV_0
  142. # device id
  143. 0
  144. ####################
  145. # DEV_0
  146. # number of cores
  147. 1
  148. ##########
  149. # number of implementations
  150. 1
  151. #####
  152. # Model for cpu0_impl0 (Comb0)
  153. # number of entries
  154. 3
  155. # sumlnx sumlnx2 sumlny sumlnxlny alpha beta n minx maxx
  156. 0.000000e+00 0.000000e+00 0.000000e+00 0.000000e+00 nan nan 0 0 0
  157. # a b c
  158. nan nan nan
  159. # hash size flops mean (us) dev (us) sum sum2 n
  160. 24c84a50 11059200 1.769472e+09 3.494026e+04 6.587010e+03 1.697048e+08 6.140270e+12 4857
  161. f0ac7beb 4915200 5.242880e+08 1.147661e+04 2.242393e+03 3.799907e+07 4.527495e+11 3311
  162. d46431bb 1228800 6.553600e+07 1.593513e+03 3.073908e+02 2.396962e+07 3.961722e+10 15042