starpu-max/tests/StreamFMA_MAX5C_DFE_SIM/scratch/Manager_StreamFMA_Final.mxg

<?xml version="1.0" encoding="UTF-8" ?>
<ManagerGraph version="2018.3.1" design_name="Manager_StreamFMA" compilation_phase="Final" hardwareBuild="false">
	<Node id="61" instanceName="addrgen_cmd_MemoryControllerPro0_oDataT2" type="McpAddressGenerator">
		<Output clock="STREAM" name="cgen_out_0" type="PUSH 1" width="64">
			<Stream name="Stream_63" sink="193" />
		</Output>
	</Node>
	<Node id="2" instanceName="inAT1" type="Input">
		<Output clock="PCIE" name="inAT1" type="PUSH 2" width="128">
			<Stream name="Stream_3" sink="137" />
		</Output>
	</Node>
	<Node id="57" instanceName="addrgen_cmd_MemoryControllerPro0_oDataT1" type="McpAddressGenerator">
		<Output clock="STREAM" name="cgen_out_0" type="PUSH 1" width="64">
			<Stream name="Stream_59" sink="189" />
		</Output>
	</Node>
	<Node id="45" instanceName="addrgen_cmd_MemoryControllerPro0_inBT2" type="McpAddressGenerator">
		<Output clock="STREAM" name="cgen_out_0" type="PUSH 1" width="64">
			<Stream name="Stream_47" sink="177" />
		</Output>
	</Node>
	<Node id="5" instanceName="inBT1" type="Input">
		<Output clock="PCIE" name="inBT1" type="PUSH 2" width="128">
			<Stream name="Stream_6" sink="141" />
		</Output>
	</Node>
	<Node id="49" instanceName="addrgen_cmd_MemoryControllerPro0_inAT3" type="McpAddressGenerator">
		<Output clock="STREAM" name="cgen_out_0" type="PUSH 1" width="64">
			<Stream name="Stream_51" sink="181" />
		</Output>
	</Node>
	<Node id="53" instanceName="addrgen_cmd_MemoryControllerPro0_inBT3" type="McpAddressGenerator">
		<Output clock="STREAM" name="cgen_out_0" type="PUSH 1" width="64">
			<Stream name="Stream_55" sink="185" />
		</Output>
	</Node>
	<Node id="41" instanceName="addrgen_cmd_MemoryControllerPro0_inAT2" type="McpAddressGenerator">
		<Output clock="STREAM" name="cgen_out_0" type="PUSH 1" width="64">
			<Stream name="Stream_43" sink="173" />
		</Output>
	</Node>
	<Node id="189" instanceName="Stream_58" type="Fifo">
		<Input clock="STREAM" name="input" type="PUSH 1" width="64">
			<Stream name="Stream_190" source="57" />
		</Input>
		<Output clock="MemoryControllerPro0_clk" name="output" type="PUSH 8" width="64">
			<Stream name="Stream_191" sink="22" />
		</Output>
	</Node>
	<Node id="181" instanceName="Stream_50" type="Fifo">
		<Input clock="STREAM" name="input" type="PUSH 1" width="64">
			<Stream name="Stream_182" source="49" />
		</Input>
		<Output clock="MemoryControllerPro0_clk" name="output" type="PUSH 8" width="64">
			<Stream name="Stream_183" sink="22" />
		</Output>
	</Node>
	<Node id="173" instanceName="Stream_42" type="Fifo">
		<Input clock="STREAM" name="input" type="PUSH 1" width="64">
			<Stream name="Stream_174" source="41" />
		</Input>
		<Output clock="MemoryControllerPro0_clk" name="output" type="PUSH 8" width="64">
			<Stream name="Stream_175" sink="22" />
		</Output>
	</Node>
	<Node id="137" instanceName="Stream_98" type="Fifo">
		<Input clock="PCIE" name="input" type="PUSH 2" width="128">
			<Stream name="Stream_138" source="2" />
		</Input>
		<Output clock="PCIE" name="output" type="PULL el=1" width="128">
			<Stream name="Stream_139" sink="97" />
		</Output>
	</Node>
	<Node id="193" instanceName="Stream_62" type="Fifo">
		<Input clock="STREAM" name="input" type="PUSH 1" width="64">
			<Stream name="Stream_194" source="61" />
		</Input>
		<Output clock="MemoryControllerPro0_clk" name="output" type="PUSH 8" width="64">
			<Stream name="Stream_195" sink="22" />
		</Output>
	</Node>
	<Node id="185" instanceName="Stream_54" type="Fifo">
		<Input clock="STREAM" name="input" type="PUSH 1" width="64">
			<Stream name="Stream_186" source="53" />
		</Input>
		<Output clock="MemoryControllerPro0_clk" name="output" type="PUSH 8" width="64">
			<Stream name="Stream_187" sink="22" />
		</Output>
	</Node>
	<Node id="177" instanceName="Stream_46" type="Fifo">
		<Input clock="STREAM" name="input" type="PUSH 1" width="64">
			<Stream name="Stream_178" source="45" />
		</Input>
		<Output clock="MemoryControllerPro0_clk" name="output" type="PUSH 8" width="64">
			<Stream name="Stream_179" sink="22" />
		</Output>
	</Node>
	<Node id="141" instanceName="Stream_102" type="Fifo">
		<Input clock="PCIE" name="input" type="PUSH 2" width="128">
			<Stream name="Stream_142" source="5" />
		</Input>
		<Output clock="PCIE" name="output" type="PULL el=1" width="128">
			<Stream name="Stream_143" sink="101" />
		</Output>
	</Node>
	<Node id="101" instanceName="Stream_4" type="DualAspectMux">
		<Input clock="PCIE" name="input" type="PULL el=1" width="128">
			<Stream name="Stream_144" source="141" />
		</Input>
		<Output clock="PCIE" name="output" type="PUSH 2" width="32">
			<Stream name="Stream_103" sink="201" />
		</Output>
	</Node>
	<Node id="97" instanceName="Stream_1" type="DualAspectMux">
		<Input clock="PCIE" name="input" type="PULL el=1" width="128">
			<Stream name="Stream_140" source="137" />
		</Input>
		<Output clock="PCIE" name="output" type="PUSH 2" width="32">
			<Stream name="Stream_99" sink="197" />
		</Output>
	</Node>
	<Node id="201" instanceName="Stream_104" type="Fifo">
		<Input clock="PCIE" name="input" type="PUSH 2" width="32">
			<Stream name="Stream_202" source="101" />
		</Input>
		<Output clock="STREAM" name="output" type="PULL el=1 ael=2" width="32">
			<Stream name="Stream_203" sink="0" />
		</Output>
	</Node>
	<Node id="197" instanceName="Stream_100" type="Fifo">
		<Input clock="PCIE" name="input" type="PUSH 2" width="32">
			<Stream name="Stream_198" source="97" />
		</Input>
		<Output clock="STREAM" name="output" type="PULL el=1 ael=2" width="32">
			<Stream name="Stream_199" sink="0" />
		</Output>
	</Node>
	<Node id="129" instanceName="Stream_96" type="PullPushAdapter">
		<Input clock="STREAM" name="input" type="PULL el=1" width="1536">
			<Stream name="Stream_130" source="93" />
		</Input>
		<Output clock="STREAM" name="output" type="PUSH 1" width="1536">
			<Stream name="Stream_131" sink="22" />
		</Output>
	</Node>
	<Node id="77" instanceName="Stream_28_pipeline_4" type="Pipeline">
		<Input clock="MemoryControllerPro0_clk" name="input" type="PUSH 3" width="544">
			<Stream name="Stream_78" source="22" />
		</Input>
		<Output clock="MemoryControllerPro0_clk" name="output" type="PUSH 11" width="544">
			<Stream name="Stream_79" sink="149" />
		</Output>
	</Node>
	<Node id="149" instanceName="Stream_80" type="Fifo">
		<Input clock="MemoryControllerPro0_clk" name="input" type="PUSH 11" width="544">
			<Stream name="Stream_150" source="77" />
		</Input>
		<Output clock="DDR_CLK_b" name="output" type="PULL el=1" width="544">
			<Stream name="Stream_151" sink="26" />
		</Output>
	</Node>
	<Node id="26" instanceName="MemoryControllerInterface_b" type="Max5Mci">
		<Input clock="DDR_CLK_b" name="cmd_stream_maxj" type="PULL el=1" width="544">
			<Stream name="Stream_152" source="149" />
		</Input>
		<Output clock="DDR_CLK_b" name="read_stream_maxj" type="PUSH 1" width="512">
			<Stream name="Stream_29" sink="69" />
		</Output>
	</Node>
	<Node id="69" instanceName="Stream_29_pipeline_4" type="Pipeline">
		<Input clock="DDR_CLK_b" name="input" type="PUSH 1" width="512">
			<Stream name="Stream_70" source="26" />
		</Input>
		<Output clock="DDR_CLK_b" name="output" type="PUSH 9" width="512">
			<Stream name="Stream_71" sink="165" />
		</Output>
	</Node>
	<Node id="165" instanceName="Stream_72" type="Fifo">
		<Input clock="DDR_CLK_b" name="input" type="PUSH 9" width="512">
			<Stream name="Stream_166" source="69" />
		</Input>
		<Output clock="MemoryControllerPro0_clk" name="output" type="PULL el=1 ael=3" width="512">
			<Stream name="Stream_167" sink="22" />
		</Output>
	</Node>
	<Node id="153" instanceName="Stream_84" type="Fifo">
		<Input clock="MemoryControllerPro0_clk" name="input" type="PUSH 11" width="544">
			<Stream name="Stream_154" source="81" />
		</Input>
		<Output clock="DDR_CLK_a" name="output" type="PULL el=1" width="544">
			<Stream name="Stream_155" sink="31" />
		</Output>
	</Node>
	<Node id="31" instanceName="MemoryControllerInterface_a" type="Max5Mci">
		<Input clock="DDR_CLK_a" name="cmd_stream_maxj" type="PULL el=1" width="544">
			<Stream name="Stream_156" source="153" />
		</Input>
		<Output clock="DDR_CLK_a" name="read_stream_maxj" type="PUSH 1" width="512">
			<Stream name="Stream_34" sink="65" />
		</Output>
	</Node>
	<Node id="65" instanceName="Stream_34_pipeline_4" type="Pipeline">
		<Input clock="DDR_CLK_a" name="input" type="PUSH 1" width="512">
			<Stream name="Stream_66" source="31" />
		</Input>
		<Output clock="DDR_CLK_a" name="output" type="PUSH 9" width="512">
			<Stream name="Stream_67" sink="161" />
		</Output>
	</Node>
	<Node id="161" instanceName="Stream_68" type="Fifo">
		<Input clock="DDR_CLK_a" name="input" type="PUSH 9" width="512">
			<Stream name="Stream_162" source="65" />
		</Input>
		<Output clock="MemoryControllerPro0_clk" name="output" type="PULL el=1 ael=3" width="512">
			<Stream name="Stream_163" sink="22" />
		</Output>
	</Node>
	<Node id="157" instanceName="Stream_90" type="Fifo">
		<Input clock="STREAM" name="input" type="PUSH 5" width="32">
			<Stream name="Stream_158" source="0" />
		</Input>
		<Output clock="STREAM" name="output" type="PULL el=1" width="32">
			<Stream name="Stream_159" sink="89" />
		</Output>
	</Node>
	<Node id="89" instanceName="Stream_60" type="DualAspectReg">
		<Input clock="STREAM" name="input" type="PULL el=1" width="32">
			<Stream name="Stream_160" source="157" />
		</Input>
		<Output clock="STREAM" name="output" type="PULL el=1" width="1536">
			<Stream name="Stream_91" sink="125" />
		</Output>
	</Node>
	<Node id="125" instanceName="Stream_92" type="PullPushAdapter">
		<Input clock="STREAM" name="input" type="PULL el=1" width="1536">
			<Stream name="Stream_126" source="89" />
		</Input>
		<Output clock="STREAM" name="output" type="PUSH 1" width="1536">
			<Stream name="Stream_127" sink="22" />
		</Output>
	</Node>
	<Node id="105" instanceName="Stream_8" type="DualAspectMux">
		<Input clock="STREAM" name="input" type="PULL el=1" width="1536">
			<Stream name="Stream_106" source="22" />
		</Input>
		<Output clock="STREAM" name="output" type="PUSH 2" width="32">
			<Stream name="Stream_107" sink="205" />
		</Output>
	</Node>
	<Node id="205" instanceName="Stream_108" type="Fifo">
		<Input clock="STREAM" name="input" type="PUSH 2" width="32">
			<Stream name="Stream_206" source="105" />
		</Input>
		<Output clock="STREAM" name="output" type="PULL el=1 ael=2" width="32">
			<Stream name="Stream_207" sink="0" />
		</Output>
	</Node>
	<Node id="209" instanceName="Stream_112" type="Fifo">
		<Input clock="STREAM" name="input" type="PUSH 2" width="32">
			<Stream name="Stream_210" source="109" />
		</Input>
		<Output clock="STREAM" name="output" type="PULL el=1 ael=2" width="32">
			<Stream name="Stream_211" sink="0" />
		</Output>
	</Node>
	<Node id="133" instanceName="Stream_124" type="PullPushAdapter">
		<Input clock="PCIE" name="input" type="PULL el=1" width="128">
			<Stream name="Stream_134" source="121" />
		</Input>
		<Output clock="PCIE" name="output" type="PUSH 1" width="128">
			<Stream name="Stream_135" sink="19" />
		</Output>
	</Node>
	<Node id="19" instanceName="oDataT3" type="Output">
		<Input clock="PCIE" name="oDataT3" type="PUSH 1" width="128">
			<Stream name="Stream_136" source="133" />
		</Input>
	</Node>
	<Node id="109" instanceName="Stream_10" type="DualAspectMux">
		<Input clock="STREAM" name="input" type="PULL el=1" width="1536">
			<Stream name="Stream_110" source="22" />
		</Input>
		<Output clock="STREAM" name="output" type="PUSH 2" width="32">
			<Stream name="Stream_111" sink="209" />
		</Output>
	</Node>
	<Node id="73" instanceName="Stream_39_pipeline_4" type="Pipeline">
		<Input clock="DDR_CLK_c" name="input" type="PUSH 1" width="512">
			<Stream name="Stream_74" source="36" />
		</Input>
		<Output clock="DDR_CLK_c" name="output" type="PUSH 9" width="512">
			<Stream name="Stream_75" sink="169" />
		</Output>
	</Node>
	<Node id="169" instanceName="Stream_76" type="Fifo">
		<Input clock="DDR_CLK_c" name="input" type="PUSH 9" width="512">
			<Stream name="Stream_170" source="73" />
		</Input>
		<Output clock="MemoryControllerPro0_clk" name="output" type="PULL el=1 ael=3" width="512">
			<Stream name="Stream_171" sink="22" />
		</Output>
	</Node>
	<Node id="22" instanceName="MemoryControllerPro0" type="MemoryControllerPro">
		<Input clock="MemoryControllerPro0_clk" name="read_stream_maxj_a" type="PULL el=1 ael=3" width="512">
			<Stream name="Stream_164" source="161" />
		</Input>
		<Input clock="MemoryControllerPro0_clk" name="read_stream_maxj_b" type="PULL el=1 ael=3" width="512">
			<Stream name="Stream_168" source="165" />
		</Input>
		<Input clock="MemoryControllerPro0_clk" name="read_stream_maxj_c" type="PULL el=1 ael=3" width="512">
			<Stream name="Stream_172" source="169" />
		</Input>
		<Input clock="MemoryControllerPro0_clk" name="read_command_0" type="PUSH 8" width="64">
			<Stream name="Stream_176" source="173" />
		</Input>
		<Input clock="MemoryControllerPro0_clk" name="read_command_1" type="PUSH 8" width="64">
			<Stream name="Stream_180" source="177" />
		</Input>
		<Input clock="MemoryControllerPro0_clk" name="read_command_2" type="PUSH 8" width="64">
			<Stream name="Stream_184" source="181" />
		</Input>
		<Input clock="MemoryControllerPro0_clk" name="read_command_3" type="PUSH 8" width="64">
			<Stream name="Stream_188" source="185" />
		</Input>
		<Input clock="STREAM" name="write_0" type="PUSH 8" width="1536">
			<Stream name="Stream_128" source="125" />
		</Input>
		<Input clock="STREAM" name="write_1" type="PUSH 8" width="1536">
			<Stream name="Stream_132" source="129" />
		</Input>
		<Input clock="MemoryControllerPro0_clk" name="write_command_0" type="PUSH 8" width="64">
			<Stream name="Stream_192" source="189" />
		</Input>
		<Input clock="MemoryControllerPro0_clk" name="write_command_1" type="PUSH 8" width="64">
			<Stream name="Stream_196" source="193" />
		</Input>
		<Output clock="STREAM" name="read_0" type="PULL el=1 ael=8" width="1536">
			<Stream name="Stream_44" sink="105" />
		</Output>
		<Output clock="STREAM" name="read_1" type="PULL el=1 ael=8" width="1536">
			<Stream name="Stream_48" sink="109" />
		</Output>
		<Output clock="STREAM" name="read_2" type="PULL el=1 ael=8" width="1536">
			<Stream name="Stream_52" sink="113" />
		</Output>
		<Output clock="STREAM" name="read_3" type="PULL el=1 ael=8" width="1536">
			<Stream name="Stream_56" sink="117" />
		</Output>
		<Output clock="MemoryControllerPro0_clk" name="Tag_Out" type="PUSH 1" width="1">
			<Stream name="Stream_25" sink="23" />
		</Output>
		<Output clock="MemoryControllerPro0_clk" name="cmd_stream_maxj_a" type="PUSH 3" width="544">
			<Stream name="Stream_33" sink="81" />
		</Output>
		<Output clock="MemoryControllerPro0_clk" name="cmd_stream_maxj_b" type="PUSH 3" width="544">
			<Stream name="Stream_28" sink="77" />
		</Output>
		<Output clock="MemoryControllerPro0_clk" name="cmd_stream_maxj_c" type="PUSH 3" width="544">
			<Stream name="Stream_38" sink="85" />
		</Output>
	</Node>
	<Node id="23" instanceName="MemoryControllerPro0_IntSource" type="_A">
		<Input clock="MemoryControllerPro0_clk" name="Tag_In" type="PUSH 1" width="1">
			<Stream name="Stream_24" source="22" />
		</Input>
	</Node>
	<Node id="113" instanceName="Stream_12" type="DualAspectMux">
		<Input clock="STREAM" name="input" type="PULL el=1" width="1536">
			<Stream name="Stream_114" source="22" />
		</Input>
		<Output clock="STREAM" name="output" type="PUSH 2" width="32">
			<Stream name="Stream_115" sink="213" />
		</Output>
	</Node>
	<Node id="117" instanceName="Stream_14" type="DualAspectMux">
		<Input clock="STREAM" name="input" type="PULL el=1" width="1536">
			<Stream name="Stream_118" source="22" />
		</Input>
		<Output clock="STREAM" name="output" type="PUSH 2" width="32">
			<Stream name="Stream_119" sink="217" />
		</Output>
	</Node>
	<Node id="85" instanceName="Stream_38_pipeline_4" type="Pipeline">
		<Input clock="MemoryControllerPro0_clk" name="input" type="PUSH 3" width="544">
			<Stream name="Stream_86" source="22" />
		</Input>
		<Output clock="MemoryControllerPro0_clk" name="output" type="PUSH 11" width="544">
			<Stream name="Stream_87" sink="221" />
		</Output>
	</Node>
	<Node id="81" instanceName="Stream_33_pipeline_4" type="Pipeline">
		<Input clock="MemoryControllerPro0_clk" name="input" type="PUSH 3" width="544">
			<Stream name="Stream_82" source="22" />
		</Input>
		<Output clock="MemoryControllerPro0_clk" name="output" type="PUSH 11" width="544">
			<Stream name="Stream_83" sink="153" />
		</Output>
	</Node>
	<Node id="213" instanceName="Stream_116" type="Fifo">
		<Input clock="STREAM" name="input" type="PUSH 2" width="32">
			<Stream name="Stream_214" source="113" />
		</Input>
		<Output clock="STREAM" name="output" type="PULL el=1 ael=2" width="32">
			<Stream name="Stream_215" sink="0" />
		</Output>
	</Node>
	<Node id="217" instanceName="Stream_120" type="Fifo">
		<Input clock="STREAM" name="input" type="PUSH 2" width="32">
			<Stream name="Stream_218" source="117" />
		</Input>
		<Output clock="STREAM" name="output" type="PULL el=1 ael=2" width="32">
			<Stream name="Stream_219" sink="0" />
		</Output>
	</Node>
	<Node id="221" instanceName="Stream_88" type="Fifo">
		<Input clock="MemoryControllerPro0_clk" name="input" type="PUSH 11" width="544">
			<Stream name="Stream_222" source="85" />
		</Input>
		<Output clock="DDR_CLK_c" name="output" type="PULL el=1" width="544">
			<Stream name="Stream_223" sink="36" />
		</Output>
	</Node>
	<Node id="0" instanceName="StreamFMAKernel" type="Kernel">
		<PxgFile phase="original">StreamFMA-StreamFMAKernel-original.pxg</PxgFile>
		<PxgFile phase="final-simulation">StreamFMA-StreamFMAKernel-final-simulation.pxg</PxgFile>
		<Input clock="STREAM" name="inAT1" type="PULL el=1 ael=2" width="32">
			<Stream name="Stream_200" source="197" />
		</Input>
		<Input clock="STREAM" name="inBT1" type="PULL el=1 ael=2" width="32">
			<Stream name="Stream_204" source="201" />
		</Input>
		<Input clock="STREAM" name="inAT2" type="PULL el=1 ael=2" width="32">
			<Stream name="Stream_208" source="205" />
		</Input>
		<Input clock="STREAM" name="inBT2" type="PULL el=1 ael=2" width="32">
			<Stream name="Stream_212" source="209" />
		</Input>
		<Input clock="STREAM" name="inAT3" type="PULL el=1 ael=2" width="32">
			<Stream name="Stream_216" source="213" />
		</Input>
		<Input clock="STREAM" name="inBT3" type="PULL el=1 ael=2" width="32">
			<Stream name="Stream_220" source="217" />
		</Input>
		<Output clock="STREAM" name="oDataT1" type="PUSH 5" width="32">
			<Stream name="Stream_16" sink="157" />
		</Output>
		<Output clock="STREAM" name="oDataT2" type="PUSH 5" width="32">
			<Stream name="Stream_18" sink="145" />
		</Output>
		<Output clock="STREAM" name="oDataT3" type="PUSH 5" width="32">
			<Stream name="Stream_21" sink="225" />
		</Output>
	</Node>
	<Node id="36" instanceName="MemoryControllerInterface_c" type="Max5Mci">
		<Input clock="DDR_CLK_c" name="cmd_stream_maxj" type="PULL el=1" width="544">
			<Stream name="Stream_224" source="221" />
		</Input>
		<Output clock="DDR_CLK_c" name="read_stream_maxj" type="PUSH 1" width="512">
			<Stream name="Stream_39" sink="73" />
		</Output>
	</Node>
	<Node id="225" instanceName="Stream_122" type="Fifo">
		<Input clock="STREAM" name="input" type="PUSH 5" width="32">
			<Stream name="Stream_226" source="0" />
		</Input>
		<Output clock="PCIE" name="output" type="PULL el=1" width="32">
			<Stream name="Stream_227" sink="121" />
		</Output>
	</Node>
	<Node id="145" instanceName="Stream_94" type="Fifo">
		<Input clock="STREAM" name="input" type="PUSH 5" width="32">
			<Stream name="Stream_146" source="0" />
		</Input>
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</ManagerGraph>