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- ##################
- # Performance Model Version
- 44
- ####################
- # COMBs
- # number of combinations
- 4
- ####################
- # COMB_3
- # number of types devices
- 1
- ####################
- # DEV_0
- # device type (CPU - 0, CUDA - 1, OPENCL - 2, MIC - 3, SCC - 4)
- 0
- ####################
- # DEV_0
- # device id
- 0
- ####################
- # DEV_0
- # number of cores
- 1
- ##########
- # number of implementations
- 1
- #####
- # Model for cpu0_impl0 (Comb3)
- # number of entries
- 3
- # sumlnx sumlnx2 sumlny sumlnxlny alpha beta n minx maxx
- 0.000000e+00 0.000000e+00 0.000000e+00 0.000000e+00 nan nan 0 0 0
- # a b c
- nan nan nan
- # hash size flops mean (us) dev (us) sum sum2 n
- 492beed5 66355200 7.077888e+09 6.739553e+05 1.180373e+04 5.391643e+07 3.634841e+13 80
- 0b0b0ce8 7372800 2.621440e+08 2.919185e+04 3.106016e+03 2.335348e+06 6.894489e+10 80
- 4220e23d 29491200 2.097152e+09 2.058556e+05 4.934163e+03 1.646845e+07 3.392071e+12 80
- ####################
- # COMB_2
- # number of types devices
- 1
- ####################
- # DEV_0
- # device type (CPU - 0, CUDA - 1, OPENCL - 2, MIC - 3, SCC - 4)
- 1
- ####################
- # DEV_0
- # device id
- 0
- ####################
- # DEV_0
- # number of cores
- 1
- ##########
- # number of implementations
- 1
- #####
- # Model for cuda0_impl0 (Comb2)
- # number of entries
- 3
- # sumlnx sumlnx2 sumlny sumlnxlny alpha beta n minx maxx
- 0.000000e+00 0.000000e+00 0.000000e+00 0.000000e+00 nan nan 0 0 0
- # a b c
- nan nan nan
- # hash size flops mean (us) dev (us) sum sum2 n
- 492beed5 66355200 7.077888e+09 2.313178e+04 3.749098e+01 2.451969e+06 5.671856e+10 106
- 0b0b0ce8 7372800 2.621440e+08 1.039822e+03 4.572723e+01 9.982293e+04 1.039988e+08 96
- 4220e23d 29491200 2.097152e+09 7.017044e+03 9.150160e+00 7.367896e+05 5.170094e+09 105
- ####################
- # COMB_1
- # number of types devices
- 1
- ####################
- # DEV_0
- # device type (CPU - 0, CUDA - 1, OPENCL - 2, MIC - 3, SCC - 4)
- 1
- ####################
- # DEV_0
- # device id
- 1
- ####################
- # DEV_0
- # number of cores
- 1
- ##########
- # number of implementations
- 1
- #####
- # Model for cuda1_impl0 (Comb1)
- # number of entries
- 3
- # sumlnx sumlnx2 sumlny sumlnxlny alpha beta n minx maxx
- 0.000000e+00 0.000000e+00 0.000000e+00 0.000000e+00 nan nan 0 0 0
- # a b c
- nan nan nan
- # hash size flops mean (us) dev (us) sum sum2 n
- 492beed5 66355200 7.077888e+09 2.311999e+04 3.792305e+01 2.427599e+06 5.612623e+10 105
- 0b0b0ce8 7372800 2.621440e+08 1.036523e+03 7.589914e+00 8.810443e+04 9.132713e+07 85
- 4220e23d 29491200 2.097152e+09 7.017425e+03 3.431116e+01 7.298122e+05 5.121525e+09 104
- ####################
- # COMB_0
- # number of types devices
- 1
- ####################
- # DEV_0
- # device type (CPU - 0, CUDA - 1, OPENCL - 2, MIC - 3, SCC - 4)
- 1
- ####################
- # DEV_0
- # device id
- 2
- ####################
- # DEV_0
- # number of cores
- 1
- ##########
- # number of implementations
- 1
- #####
- # Model for cuda2_impl0 (Comb0)
- # number of entries
- 3
- # sumlnx sumlnx2 sumlny sumlnxlny alpha beta n minx maxx
- 0.000000e+00 0.000000e+00 0.000000e+00 0.000000e+00 nan nan 0 0 0
- # a b c
- nan nan nan
- # hash size flops mean (us) dev (us) sum sum2 n
- 492beed5 66355200 7.077888e+09 2.312215e+04 3.532854e+01 2.427826e+06 5.613668e+10 105
- 0b0b0ce8 7372800 2.621440e+08 1.036998e+03 4.343669e+01 1.078478e+05 1.120342e+08 104
- 4220e23d 29491200 2.097152e+09 7.010229e+03 3.598880e+01 7.360740e+05 5.160183e+09 105
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