chol_model_21.sirocco 5.4 KB

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  1. ##################
  2. # Performance Model Version
  3. 44
  4. ####################
  5. # COMBs
  6. # number of combinations
  7. 5
  8. ####################
  9. # COMB_0
  10. # number of types devices
  11. 1
  12. ####################
  13. # DEV_0
  14. # device type (CPU - 0, CUDA - 1, OPENCL - 2, MIC - 3, SCC - 4)
  15. 0
  16. ####################
  17. # DEV_0
  18. # device id
  19. 0
  20. ####################
  21. # DEV_0
  22. # number of cores
  23. 1
  24. ##########
  25. # number of implementations
  26. 1
  27. #####
  28. # Model for cpu0_impl0 (Comb0)
  29. # number of entries
  30. 4
  31. # sumlnx sumlnx2 sumlny sumlnxlny alpha beta n minx maxx
  32. 0.000000e+00 0.000000e+00 0.000000e+00 0.000000e+00 nan nan 0 0 0
  33. # a b c
  34. nan nan nan
  35. # hash size flops mean (us) dev (us) sum sum2 n
  36. 0e8bce2b 16588800 2.988058e+09 6.085177e+04 1.761936e+04 4.551712e+07 3.002008e+12 748
  37. ff82dda0 7372800 8.856576e+08 1.775772e+04 3.736007e+03 2.386637e+07 4.425714e+11 1344
  38. d39bff17 3276800 2.625536e+08 5.276862e+03 9.789431e+02 7.070995e+06 3.859682e+10 1340
  39. 2c1922b7 819200 3.287040e+07 7.675336e+02 1.464194e+02 2.842177e+06 2.260854e+09 3703
  40. ####################
  41. # COMB_3
  42. # number of types devices
  43. 1
  44. ####################
  45. # DEV_0
  46. # device type (CPU - 0, CUDA - 1, OPENCL - 2, MIC - 3, SCC - 4)
  47. 1
  48. ####################
  49. # DEV_0
  50. # device id
  51. 3
  52. ####################
  53. # DEV_0
  54. # number of cores
  55. 1
  56. ##########
  57. # number of implementations
  58. 1
  59. #####
  60. # Model for cuda3_impl0 (Comb3)
  61. # number of entries
  62. 4
  63. # sumlnx sumlnx2 sumlny sumlnxlny alpha beta n minx maxx
  64. 0.000000e+00 0.000000e+00 0.000000e+00 0.000000e+00 nan nan 0 0 0
  65. # a b c
  66. nan nan nan
  67. # hash size flops mean (us) dev (us) sum sum2 n
  68. 0e8bce2b 16588800 2.988058e+09 5.422549e+03 1.109859e+03 2.917331e+06 1.648207e+10 538
  69. ff82dda0 7372800 8.856576e+08 2.018325e+03 2.870643e+02 1.687320e+06 3.474450e+09 836
  70. d39bff17 3276800 2.625536e+08 1.179394e+03 1.705358e+02 3.538181e+05 4.260157e+08 300
  71. 2c1922b7 819200 3.287040e+07 4.644748e+02 7.687001e+01 3.297771e+04 1.573685e+07 71
  72. ####################
  73. # COMB_1
  74. # number of types devices
  75. 1
  76. ####################
  77. # DEV_0
  78. # device type (CPU - 0, CUDA - 1, OPENCL - 2, MIC - 3, SCC - 4)
  79. 1
  80. ####################
  81. # DEV_0
  82. # device id
  83. 0
  84. ####################
  85. # DEV_0
  86. # number of cores
  87. 1
  88. ##########
  89. # number of implementations
  90. 1
  91. #####
  92. # Model for cuda0_impl0 (Comb1)
  93. # number of entries
  94. 4
  95. # sumlnx sumlnx2 sumlny sumlnxlny alpha beta n minx maxx
  96. 0.000000e+00 0.000000e+00 0.000000e+00 0.000000e+00 nan nan 0 0 0
  97. # a b c
  98. nan nan nan
  99. # hash size flops mean (us) dev (us) sum sum2 n
  100. 0e8bce2b 16588800 2.988058e+09 5.480822e+03 1.130650e+03 2.899355e+06 1.656711e+10 529
  101. ff82dda0 7372800 8.856576e+08 2.005118e+03 2.787124e+02 1.836689e+06 3.753933e+09 916
  102. d39bff17 3276800 2.625536e+08 1.227664e+03 1.874122e+02 2.970946e+05 3.732321e+08 242
  103. 2c1922b7 819200 3.287040e+07 4.209987e+02 9.547071e+01 6.441281e+04 2.851225e+07 153
  104. ####################
  105. # COMB_2
  106. # number of types devices
  107. 1
  108. ####################
  109. # DEV_0
  110. # device type (CPU - 0, CUDA - 1, OPENCL - 2, MIC - 3, SCC - 4)
  111. 1
  112. ####################
  113. # DEV_0
  114. # device id
  115. 1
  116. ####################
  117. # DEV_0
  118. # number of cores
  119. 1
  120. ##########
  121. # number of implementations
  122. 1
  123. #####
  124. # Model for cuda1_impl0 (Comb2)
  125. # number of entries
  126. 4
  127. # sumlnx sumlnx2 sumlny sumlnxlny alpha beta n minx maxx
  128. 0.000000e+00 0.000000e+00 0.000000e+00 0.000000e+00 nan nan 0 0 0
  129. # a b c
  130. nan nan nan
  131. # hash size flops mean (us) dev (us) sum sum2 n
  132. 0e8bce2b 16588800 2.988058e+09 5.510320e+03 1.138149e+03 2.992104e+06 1.719084e+10 543
  133. ff82dda0 7372800 8.856576e+08 2.005118e+03 2.787124e+02 1.836689e+06 3.753933e+09 916
  134. d39bff17 3276800 2.625536e+08 1.227664e+03 1.874122e+02 2.970946e+05 3.732321e+08 242
  135. 2c1922b7 819200 3.287040e+07 4.209987e+02 9.547071e+01 6.441281e+04 2.851225e+07 153
  136. ####################
  137. # COMB_4
  138. # number of types devices
  139. 1
  140. ####################
  141. # DEV_0
  142. # device type (CPU - 0, CUDA - 1, OPENCL - 2, MIC - 3, SCC - 4)
  143. 1
  144. ####################
  145. # DEV_0
  146. # device id
  147. 2
  148. ####################
  149. # DEV_0
  150. # number of cores
  151. 1
  152. ##########
  153. # number of implementations
  154. 1
  155. #####
  156. # Model for cuda2_impl0 (Comb4)
  157. # number of entries
  158. 4
  159. # sumlnx sumlnx2 sumlny sumlnxlny alpha beta n minx maxx
  160. 0.000000e+00 0.000000e+00 0.000000e+00 0.000000e+00 nan nan 0 0 0
  161. # a b c
  162. nan nan nan
  163. # hash size flops mean (us) dev (us) sum sum2 n
  164. 0e8bce2b 16588800 2.988058e+09 5.534879e+03 1.226333e+03 3.210230e+06 1.864049e+10 580
  165. ff82dda0 7372800 8.856576e+08 2.051755e+03 2.742098e+02 1.811700e+06 3.783559e+09 883
  166. d39bff17 3276800 2.625536e+08 1.153240e+03 1.913332e+02 3.194475e+05 3.785401e+08 277
  167. 2c1922b7 819200 3.287040e+07 4.950127e+02 6.747714e+01 5.445140e+04 2.745498e+07 110