overlap_sleep_1024_24.sirocco 3.9 KB

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  1. ##################
  2. # Performance Model Version
  3. 44
  4. ####################
  5. # COMBs
  6. # number of combinations
  7. 4
  8. ####################
  9. # COMB_1
  10. # number of types devices
  11. 1
  12. ####################
  13. # DEV_0
  14. # device type (CPU - 0, CUDA - 1, OPENCL - 2, MIC - 3, SCC - 4, MPI_MS - 5)
  15. 0
  16. ####################
  17. # DEV_0
  18. # device id
  19. 0
  20. ####################
  21. # DEV_0
  22. # number of cores
  23. 1
  24. ##########
  25. # number of implementations
  26. 1
  27. #####
  28. # Model for cpu0_impl0 (Comb1)
  29. # number of entries
  30. 1
  31. # sumlnx sumlnx2 sumlny sumlnxlny alpha beta n minx maxx
  32. 0.000000e+00 0.000000e+00 0.000000e+00 0.000000e+00 nan nan 0 0 0
  33. # a b c
  34. nan nan nan
  35. # hash size flops mean (us) dev (us) sum sum2 n
  36. a3d3725e 1024 0.000000e+00 8.457435e+01 8.456846e+01 6.080896e+05 5.145841e+07 7190
  37. ####################
  38. # COMB_0
  39. # number of types devices
  40. 1
  41. ####################
  42. # DEV_0
  43. # device type (CPU - 0, CUDA - 1, OPENCL - 2, MIC - 3, SCC - 4, MPI_MS - 5)
  44. 1
  45. ####################
  46. # DEV_0
  47. # device id
  48. 0
  49. ####################
  50. # DEV_0
  51. # number of cores
  52. 1
  53. ##########
  54. # number of implementations
  55. 1
  56. #####
  57. # Model for cuda0_impl0 (Comb0)
  58. # number of entries
  59. 1
  60. # sumlnx sumlnx2 sumlny sumlnxlny alpha beta n minx maxx
  61. 0.000000e+00 0.000000e+00 0.000000e+00 0.000000e+00 nan nan 0 0 0
  62. # a b c
  63. nan nan nan
  64. # hash size flops mean (us) dev (us) sum sum2 n
  65. a3d3725e 1024 0.000000e+00 8.959785e+01 8.957735e+01 1.959505e+05 1.756781e+07 2187
  66. ####################
  67. # COMB_2
  68. # number of types devices
  69. 1
  70. ####################
  71. # DEV_0
  72. # device type (CPU - 0, CUDA - 1, OPENCL - 2, MIC - 3, SCC - 4, MPI_MS - 5)
  73. 1
  74. ####################
  75. # DEV_0
  76. # device id
  77. 2
  78. ####################
  79. # DEV_0
  80. # number of cores
  81. 1
  82. ##########
  83. # number of implementations
  84. 1
  85. #####
  86. # Model for cuda2_impl0 (Comb2)
  87. # number of entries
  88. 1
  89. # sumlnx sumlnx2 sumlny sumlnxlny alpha beta n minx maxx
  90. 0.000000e+00 0.000000e+00 0.000000e+00 0.000000e+00 nan nan 0 0 0
  91. # a b c
  92. nan nan nan
  93. # hash size flops mean (us) dev (us) sum sum2 n
  94. a3d3725e 1024 0.000000e+00 9.097446e+01 8.933429e+01 2.547285e+03 2.318591e+05 28
  95. ####################
  96. # COMB_3
  97. # number of types devices
  98. 1
  99. ####################
  100. # DEV_0
  101. # device type (CPU - 0, CUDA - 1, OPENCL - 2, MIC - 3, SCC - 4, MPI_MS - 5)
  102. 1
  103. ####################
  104. # DEV_0
  105. # device id
  106. 1
  107. ####################
  108. # DEV_0
  109. # number of cores
  110. 1
  111. ##########
  112. # number of implementations
  113. 1
  114. #####
  115. # Model for cuda1_impl0 (Comb3)
  116. # number of entries
  117. 1
  118. # sumlnx sumlnx2 sumlny sumlnxlny alpha beta n minx maxx
  119. 0.000000e+00 0.000000e+00 0.000000e+00 0.000000e+00 nan nan 0 0 0
  120. # a b c
  121. nan nan nan
  122. # hash size flops mean (us) dev (us) sum sum2 n
  123. a3d3725e 1024 0.000000e+00 9.082936e+01 9.075245e+01 5.368015e+04 4.878224e+06 591
  124. ####################
  125. # COMB_4
  126. # number of types devices
  127. 1
  128. ####################
  129. # DEV_0
  130. # device type (CPU - 0, CUDA - 1, OPENCL - 2, MIC - 3, SCC - 4, MPI_MS - 5)
  131. 1
  132. ####################
  133. # DEV_0
  134. # device id
  135. 3
  136. ####################
  137. # DEV_0
  138. # number of cores
  139. 1
  140. ##########
  141. # number of implementations
  142. 1
  143. #####
  144. # Model for cuda3_impl0 (Comb4)
  145. # number of entries
  146. 1
  147. # sumlnx sumlnx2 sumlny sumlnxlny alpha beta n minx maxx
  148. 0.000000e+00 0.000000e+00 0.000000e+00 0.000000e+00 nan nan 0 0 0
  149. # a b c
  150. nan nan nan
  151. # hash size flops mean (us) dev (us) sum sum2 n
  152. a3d3725e 1024 0.000000e+00 9.097446e+01 8.933429e+01 2.547285e+03 2.318591e+05 28