| 123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145 |
- ##################
- # Performance Model Version
- 45
- ####################
- # COMBs
- # number of combinations
- 4
- ####################
- # COMB_0
- # number of types devices
- 1
- ####################
- # DEV_0
- # device type (CPU - 0, CUDA - 1, OPENCL - 2, MIC - 3)
- 0
- ####################
- # DEV_0
- # device id
- 0
- ####################
- # DEV_0
- # number of cores
- 1
- ##########
- # number of implementations
- 1
- #####
- # Model for cpu0_impl0 (Comb0)
- # number of entries
- 3
- # sumlnx sumlnx2 sumlny sumlnxlny alpha beta n minx maxx
- 0.000000e+00 0.000000e+00 0.000000e+00 0.000000e+00 nan nan 0 0 0
- # a b c
- nan nan nan
- # not multiple-regression-base
- 0
- # hash size flops mean (us) dev (us) sum sum2 n
- d46431bb 1228800 6.553600e+07 3.262643e+03 7.810468e+01 1.532463e+07 5.002746e+10 4697
- 24c84a50 11059200 1.769472e+09 8.778020e+04 9.598441e+02 2.889724e+08 2.536909e+13 3292
- f0ac7beb 4915200 5.242880e+08 2.647095e+04 4.073263e+02 4.762124e+07 1.260878e+12 1799
- ####################
- # COMB_1
- # number of types devices
- 1
- ####################
- # DEV_0
- # device type (CPU - 0, CUDA - 1, OPENCL - 2, MIC - 3)
- 1
- ####################
- # DEV_0
- # device id
- 0
- ####################
- # DEV_0
- # number of cores
- 1
- ##########
- # number of implementations
- 1
- #####
- # Model for cuda0_impl0 (Comb1)
- # number of entries
- 3
- # sumlnx sumlnx2 sumlny sumlnxlny alpha beta n minx maxx
- 0.000000e+00 0.000000e+00 0.000000e+00 0.000000e+00 nan nan 0 0 0
- # a b c
- nan nan nan
- # not multiple-regression-base
- 0
- # hash size flops mean (us) dev (us) sum sum2 n
- d46431bb 1228800 6.553600e+07 2.011248e+02 1.498037e+01 1.633334e+06 3.303264e+08 8121
- 24c84a50 11059200 1.769472e+09 2.805491e+03 6.931361e+01 3.683329e+07 1.033985e+11 13129
- f0ac7beb 4915200 5.242880e+08 8.944354e+02 3.828761e+01 5.687714e+06 5.096615e+09 6359
- ####################
- # COMB_2
- # number of types devices
- 1
- ####################
- # DEV_0
- # device type (CPU - 0, CUDA - 1, OPENCL - 2, MIC - 3)
- 1
- ####################
- # DEV_0
- # device id
- 1
- ####################
- # DEV_0
- # number of cores
- 1
- ##########
- # number of implementations
- 1
- #####
- # Model for cuda1_impl0 (Comb2)
- # number of entries
- 3
- # sumlnx sumlnx2 sumlny sumlnxlny alpha beta n minx maxx
- 0.000000e+00 0.000000e+00 0.000000e+00 0.000000e+00 nan nan 0 0 0
- # a b c
- nan nan nan
- # not multiple-regression-base
- 0
- # hash size flops mean (us) dev (us) sum sum2 n
- d46431bb 1228800 6.553600e+07 2.004836e+02 1.337883e+01 1.620709e+06 3.263726e+08 8084
- 24c84a50 11059200 1.769472e+09 2.828590e+03 6.702999e+01 3.650578e+07 1.033178e+11 12906
- f0ac7beb 4915200 5.242880e+08 9.090465e+02 3.898196e+01 5.691540e+06 5.183389e+09 6261
- ####################
- # COMB_3
- # number of types devices
- 1
- ####################
- # DEV_0
- # device type (CPU - 0, CUDA - 1, OPENCL - 2, MIC - 3)
- 1
- ####################
- # DEV_0
- # device id
- 2
- ####################
- # DEV_0
- # number of cores
- 1
- ##########
- # number of implementations
- 1
- #####
- # Model for cuda2_impl0 (Comb3)
- # number of entries
- 3
- # sumlnx sumlnx2 sumlny sumlnxlny alpha beta n minx maxx
- 0.000000e+00 0.000000e+00 0.000000e+00 0.000000e+00 nan nan 0 0 0
- # a b c
- nan nan nan
- # not multiple-regression-base
- 0
- # hash size flops mean (us) dev (us) sum sum2 n
- d46431bb 1228800 6.553600e+07 1.603761e+02 1.178063e+01 1.522450e+06 2.454821e+08 9493
- 24c84a50 11059200 1.769472e+09 2.828209e+03 7.003112e+01 3.675541e+07 1.040157e+11 12996
- f0ac7beb 4915200 5.242880e+08 8.858930e+02 3.323656e+01 5.675030e+06 5.034546e+09 6406
|
