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fpga: Rename oData to outC for coherency

Samuel Thibault 4 年之前
父節點
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68359e9a60
共有 4 個文件被更改,包括 17 次插入17 次删除
  1. 8 8
      tests/fpga/MyTasksManager.maxj
  2. 3 3
      tests/fpga/Task1.maxj
  3. 3 3
      tests/fpga/Task2.maxj
  4. 3 3
      tests/fpga/Task3.maxj

+ 8 - 8
tests/fpga/MyTasksManager.maxj

@@ -30,8 +30,8 @@ public class MyTasksManager extends MAX5CManager
 
                 kernel1.getInput("inBT1") <== addStreamFromCPU("inBT1");
 
-                DFELink oDataT1 = iface.addStreamToLMem("oDataT1", LMemCommandGroup.MemoryAccessPattern.LINEAR_1D);
-                oDataT1 <== kernel1.getOutput("oDataT1");
+                DFELink outCT1 = iface.addStreamToLMem("outCT1", LMemCommandGroup.MemoryAccessPattern.LINEAR_1D);
+                outCT1 <== kernel1.getOutput("outCT1");
 
 
                 DFELink inAT2 = iface.addStreamFromLMem("inAT2", LMemCommandGroup.MemoryAccessPattern.LINEAR_1D);
@@ -40,8 +40,8 @@ public class MyTasksManager extends MAX5CManager
                 DFELink inBT2 = iface.addStreamFromLMem("inBT2", LMemCommandGroup.MemoryAccessPattern.LINEAR_1D);
                 kernel2.getInput("inBT2") <== inBT2;
 
-                DFELink oDataT2 = iface.addStreamToLMem("oDataT2", LMemCommandGroup.MemoryAccessPattern.LINEAR_1D);
-                oDataT2 <== kernel2.getOutput("oDataT2");
+                DFELink outCT2 = iface.addStreamToLMem("outCT2", LMemCommandGroup.MemoryAccessPattern.LINEAR_1D);
+                outCT2 <== kernel2.getOutput("outCT2");
 
 
                 DFELink inAT3 = iface.addStreamFromLMem("inAT3", LMemCommandGroup.MemoryAccessPattern.LINEAR_1D);
@@ -50,7 +50,7 @@ public class MyTasksManager extends MAX5CManager
                 DFELink inBT3 = iface.addStreamFromLMem("inBT3", LMemCommandGroup.MemoryAccessPattern.LINEAR_1D);
                 kernel3.getInput("inBT3") <== inBT3;
 
-                addStreamToCPU("oDataT3") <== kernel3.getOutput("oDataT3");
+                addStreamToCPU("outCT3") <== kernel3.getOutput("outCT3");
 
 
                 createSlicInterface(interfaceT1("interfaceT1"));
@@ -81,7 +81,7 @@ public class MyTasksManager extends MAX5CManager
 
                 ei.setStream("inAT1", TYPE, sizeInBytes);
                 ei.setStream("inBT1", TYPE, sizeInBytes);
-                ei.setLMemLinear("oDataT1", ptrC1, sizeInBytes);
+                ei.setLMemLinear("outCT1", ptrC1, sizeInBytes);
 
                 ei.ignoreAll(Direction.IN_OUT);
 
@@ -112,7 +112,7 @@ public class MyTasksManager extends MAX5CManager
 
                 ei.setLMemLinear("inAT2", ptrA2, sizeInBytes);
                 ei.setLMemLinear("inBT2", ptrB2, sizeInBytes);
-                ei.setLMemLinear("oDataT2", ptrC2, sizeInBytes);
+                ei.setLMemLinear("outCT2", ptrC2, sizeInBytes);
 
                 ei.ignoreAll(Direction.IN_OUT);
 
@@ -140,7 +140,7 @@ public class MyTasksManager extends MAX5CManager
 
                 ei.setLMemLinear("inAT3", ptrA3, sizeInBytes);
                 ei.setLMemLinear("inBT3", ptrB3, sizeInBytes);
-                ei.setStream("oDataT3", TYPE, sizeInBytes);
+                ei.setStream("outCT3", TYPE, sizeInBytes);
 
                 ei.ignoreAll(Direction.IN_OUT);
 

+ 3 - 3
tests/fpga/Task1.maxj

@@ -15,10 +15,10 @@ class Task1 extends Kernel
 
                 DFEVar inAT1 = io.input("inAT1", type);
                 DFEVar inBT1 = io.input("inBT1", type);
-                DFEVar oDataT1;
+                DFEVar outCT1;
 
-                oDataT1 = inAT1+inBT1;
+                outCT1 = inAT1+inBT1;
 
-                io.output("oDataT1", oDataT1, type);
+                io.output("outCT1", outCT1, type);
 	}
 }

+ 3 - 3
tests/fpga/Task2.maxj

@@ -15,10 +15,10 @@ class Task2 extends Kernel
 
                 DFEVar inAT2 = io.input("inAT2", type);
                 DFEVar inBT2 = io.input("inBT2", type);
-                DFEVar oDataT2;
+                DFEVar outCT2;
 
-                oDataT2 = inAT2*inBT2;
+                outCT2 = inAT2*inBT2;
 
-                io.output("oDataT2", oDataT2, type);
+                io.output("outCT2", outCT2, type);
 	}
 }

+ 3 - 3
tests/fpga/Task3.maxj

@@ -15,10 +15,10 @@ class Task3 extends Kernel
 
                 DFEVar inAT3 = io.input("inAT3", type);
                 DFEVar inBT3 = io.input("inBT3", type);
-                DFEVar oDataT3;
+                DFEVar outCT3;
 
-                oDataT3 = inAT3+inBT3;
+                outCT3 = inAT3+inBT3;
 
-                io.output("oDataT3", oDataT3, type);
+                io.output("outCT3", outCT3, type);
 	}
 }